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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers , Beata Michalska Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Sat, 11 Jul 2020 at 11:10, Andrew Jones wrote: > > Move the KVM PMU setup part of fdt_add_pmu_nodes() to > virt_cpu_post_init(), which is a more appropriate location. Now > fdt_add_pmu_nodes() is also named more appropriately, because it > no longer does anything but fdt node creation. > > No functional change intended. > > Signed-off-by: Andrew Jones > --- > hw/arm/virt.c | 33 +++++++++++++++------------------ > 1 file changed, 15 insertions(+), 18 deletions(-) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index cb2fa99b1ef5..63ef530933e5 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -521,30 +521,15 @@ static void fdt_add_gic_node(VirtMachineState *vms) > > static void fdt_add_pmu_nodes(const VirtMachineState *vms) > { > - CPUState *cpu; > - ARMCPU *armcpu; > + ARMCPU *armcpu = ARM_CPU(first_cpu); > uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI; > > - CPU_FOREACH(cpu) { > - armcpu = ARM_CPU(cpu); > - if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { > - return; > - } So previously we would say "if the CPU doesn't actually have a PMU, don't put the PMU nodes in the FDT", but in the new logic it looks like we put the PMU nodes in the FDT unconditionally ? > - if (kvm_enabled()) { > - if (kvm_irqchip_in_kernel()) { > - kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); > - } > - kvm_arm_pmu_init(cpu); > - } > - } > - > if (vms->gic_version == VIRT_GIC_VERSION_2) { > irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START, > GIC_FDT_IRQ_PPI_CPU_WIDTH, > (1 << vms->smp_cpus) - 1); > } > > - armcpu = ARM_CPU(qemu_get_cpu(0)); > qemu_fdt_add_subnode(vms->fdt, "/pmu"); > if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { > const char compat[] = "arm,armv8-pmuv3"; > @@ -1678,11 +1663,23 @@ static void finalize_gic_version(VirtMachineState *vms) > */ > static void virt_cpu_post_init(VirtMachineState *vms) > { > - bool aarch64; > + bool aarch64, pmu; > + CPUState *cpu; > > aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL); > + pmu = object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); > > - if (!kvm_enabled()) { > + if (kvm_enabled()) { > + CPU_FOREACH(cpu) { > + if (pmu) { > + assert(arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_PMU)); > + if (kvm_irqchip_in_kernel()) { > + kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); > + } > + kvm_arm_pmu_init(cpu); > + } > + } > + } else { > if (aarch64 && vms->highmem) { > int requested_pa_size = 64 - clz64(vms->highest_gpa); > int pamax = arm_pamax(ARM_CPU(first_cpu)); thanks -- PMM