Re: [PATCH v2 3/3] cpu/arm11mpcore: Set number of GIC priority bits to 4

From: Peter Maydell <peter.maydell@linaro.org>
To: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Cc: "Alistair Francis" <alistair@alistair23.me>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	"Anthony Liguori" <anthony@codemonkey.ws>,
	"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
	"Andreas Färber" <afaerber@suse.de>
Subject: Re: [PATCH v2 3/3] cpu/arm11mpcore: Set number of GIC priority bits to 4
Date: Fri, 21 Feb 2020 15:30:59 +0000	[thread overview]
Message-ID: <CAFEAcA9BgmTT6-1pifQhRPNyO5KVdXpdNbr0tGYF5Waw3tN3hQ@mail.gmail.com> (raw)
In-Reply-To: <1582270927-2568-4-git-send-email-sai.pavan.boddu@xilinx.com>

On Fri, 21 Feb 2020 at 07:46, Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> ARM11MPCore GIC is implemented with 4 priority bits.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Suggested-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  hw/cpu/arm11mpcore.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
> index 2e3e87c..ab9fadb 100644
> --- a/hw/cpu/arm11mpcore.c
> +++ b/hw/cpu/arm11mpcore.c
> @@ -15,6 +15,7 @@
>  #include "hw/irq.h"
>  #include "hw/qdev-properties.h"
>
> +#define ARM11MPCORE_NUM_GIC_PRIORITY_BITS    4
>
>  static void mpcore_priv_set_irq(void *opaque, int irq, int level)
>  {
> @@ -86,6 +87,10 @@ static void mpcore_priv_realize(DeviceState *dev, Error **errp)
>
>      qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
>      qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
> +    qdev_prop_set_uint32(gicdev, "num-priority-bits",
> +                         ARM11MPCORE_NUM_GIC_PRIORITY_BITS);
> +
> +
>      object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
>      if (err != NULL) {
>          error_propagate(errp, err);

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM