From: Peter Maydell <peter.maydell@linaro.org>
To: Xiang Zheng <zhengxiang9@huawei.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>,
kvm-devel <kvm@vger.kernel.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
wanghaibin.wang@huawei.com, Marcelo Tosatti <mtosatti@redhat.com>,
Linuxarm <linuxarm@huawei.com>,
QEMU Developers <qemu-devel@nongnu.org>,
gengdongjiu <gengdongjiu@huawei.com>,
Shannon Zhao <shannon.zhaosl@gmail.com>,
qemu-arm <qemu-arm@nongnu.org>, James Morse <james.morse@arm.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Igor Mammedov <imammedo@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
"xuwei \(O\)" <xuwei5@huawei.com>,
Laszlo Ersek <lersek@redhat.com>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [PATCH v18 6/6] target-arm: kvm64: handle SIGBUS signal from kernel or KVM
Date: Fri, 27 Sep 2019 14:57:54 +0100 [thread overview]
Message-ID: <CAFEAcA9Y3J8uRDN+HQO74-codKhoj5CyPW=9q3GwH8Mk_PNYTA@mail.gmail.com> (raw)
In-Reply-To: <20190906083152.25716-7-zhengxiang9@huawei.com>
On Fri, 6 Sep 2019 at 09:33, Xiang Zheng <zhengxiang9@huawei.com> wrote:
>
> From: Dongjiu Geng <gengdongjiu@huawei.com>
>
> Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type,
> translates the host VA delivered by host to guest PA, then fills this PA
> to guest APEI GHES memory, then notifies guest according to the SIGBUS
> type.
>
> If guest accesses the poisoned memory, it generates Synchronous External
> Abort(SEA). Then host kernel gets an APEI notification and calls
> memory_failure() to unmapped the affected page in stage 2, finally
> returns to guest.
>
> Guest continues to access PG_hwpoison page, it will trap to KVM as
> stage2 fault, then a SIGBUS_MCEERR_AR synchronous signal is delivered to
> Qemu, Qemu records this error address into guest APEI GHES memory and
> notifes guest using Synchronous-External-Abort(SEA).
>
> Suggested-by: James Morse <james.morse@arm.com>
> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com>
> ---
> hw/acpi/acpi_ghes.c | 252 ++++++++++++++++++++++++++++++++++++
> include/hw/acpi/acpi_ghes.h | 40 ++++++
> include/sysemu/kvm.h | 2 +-
> target/arm/kvm64.c | 39 ++++++
> 4 files changed, 332 insertions(+), 1 deletion(-)
I'll let somebody else review the ACPI parts as that's not my
area of expertise, but I'll look at the target/arm parts below:
> diff --git a/hw/acpi/acpi_ghes.c b/hw/acpi/acpi_ghes.c
> index 20c45179ff..2d17c88045 100644
> --- a/hw/acpi/acpi_ghes.c
> +++ b/hw/acpi/acpi_ghes.c
> @@ -26,6 +26,168 @@
> #include "sysemu/sysemu.h"
> #include "qemu/error-report.h"
>
> +/* Total size for Generic Error Status Block
This block comment should start with '/*' on a line of its own
(as should others in this patch). Usually checkpatch catches these
but it's not infallible.
> diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
> index 909bcd77cf..5f57e4ed43 100644
> --- a/include/sysemu/kvm.h
> +++ b/include/sysemu/kvm.h
> @@ -378,7 +378,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id);
> /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */
> unsigned long kvm_arch_vcpu_id(CPUState *cpu);
>
> -#ifdef TARGET_I386
> +#if defined(TARGET_I386) || defined(TARGET_AARCH64)
> #define KVM_HAVE_MCE_INJECTION 1
> void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr);
> #endif
Rather than introducing a new ifdef with lots of TARGET_*,
I think it would be better to have target/i386/cpu.h and
target/arm/cpu.h do "#define KVM_HAVE_MCE_INJECTION 1"
(nb that the arm cpu.h needs to define it only for aarch64,
not for 32-bit arm host compiles).
and then kvm.h can just do
#ifdef KVM_HAVE_MCE_INJECTION
void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr);
#endif
> diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
> index bf6edaa3f6..186d855522 100644
> --- a/target/arm/kvm64.c
> +++ b/target/arm/kvm64.c
> @@ -28,6 +28,8 @@
> #include "kvm_arm.h"
> #include "hw/boards.h"
> #include "internals.h"
> +#include "hw/acpi/acpi.h"
> +#include "hw/acpi/acpi_ghes.h"
>
> static bool have_guest_debug;
>
> @@ -1070,6 +1072,43 @@ int kvm_arch_get_registers(CPUState *cs)
> return ret;
> }
>
> +void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr)
> +{
> + ram_addr_t ram_addr;
> + hwaddr paddr;
> +
> + assert(code == BUS_MCEERR_AR || code == BUS_MCEERR_AO);
> +
> + if (acpi_enabled && addr &&
> + object_property_get_bool(qdev_get_machine(), "ras", NULL)) {
> + ram_addr = qemu_ram_addr_from_host(addr);
> + if (ram_addr != RAM_ADDR_INVALID &&
> + kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) {
> + kvm_hwpoison_page_add(ram_addr);
> + /* Asynchronous signal will be masked by main thread, so
> + * only handle synchronous signal.
> + */
I don't entirely understand this comment. The x86 version
of this function says:
/* If we get an action required MCE, it has been injected by KVM
* while the VM was running. An action optional MCE instead should
* be coming from the main thread, which qemu_init_sigbus identifies
* as the "early kill" thread.
*/
so we can be called for action-optional MCE here (not on the vcpu
thread). We obviously can't deliver those as a synchronous exception
to a particular CPU, but is there no mechanism for reporting them
to the guest at all?
> + if (code == BUS_MCEERR_AR) {
> + kvm_cpu_synchronize_state(c);
> + if (ACPI_GHES_CPER_FAIL !=
> + acpi_ghes_record_errors(ACPI_GHES_NOTIFY_SEA, paddr)) {
> + kvm_inject_arm_sea(c);
> + } else {
> + fprintf(stderr, "failed to record the error\n");
> + }
> + }
> + return;
> + }
> + fprintf(stderr, "Hardware memory error for memory used by "
> + "QEMU itself instead of guest system!\n");
> + }
> +
> + if (code == BUS_MCEERR_AR) {
> + fprintf(stderr, "Hardware memory error!\n");
> + exit(1);
> + }
> +}
> +
> /* C6.6.29 BRK instruction */
> static const uint32_t brk_insn = 0xd4200000;
>
thanks
-- PMM
next prev parent reply other threads:[~2019-09-27 15:46 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-06 8:31 [Qemu-devel] [PATCH v18 0/6] Add ARMv8 RAS virtualization support in QEMU Xiang Zheng
2019-09-06 8:31 ` [Qemu-devel] [PATCH v18 1/6] hw/arm/virt: Introduce RAS platform version and RAS machine option Xiang Zheng
2019-09-27 14:02 ` Peter Maydell
2019-09-29 2:04 ` Xiang Zheng
2019-09-06 8:31 ` [Qemu-devel] [PATCH v18 2/6] docs: APEI GHES generation and CPER record description Xiang Zheng
2019-09-19 13:25 ` Peter Maydell
2019-09-20 1:45 ` Xiang Zheng
2019-10-04 8:20 ` [Qemu-devel] " Igor Mammedov
2019-10-08 13:25 ` Xiang Zheng
2019-09-06 8:31 ` [Qemu-devel] [PATCH v18 3/6] ACPI: Add APEI GHES table generation support Xiang Zheng
2019-09-27 15:43 ` Michael S. Tsirkin
2019-10-08 6:00 ` Xiang Zheng
2019-10-08 7:45 ` Michael S. Tsirkin
2019-10-08 12:48 ` Xiang Zheng
2019-09-06 8:31 ` [Qemu-devel] [PATCH v18 4/6] KVM: Move hwpoison page related functions into include/sysemu/kvm_int.h Xiang Zheng
2019-09-27 13:19 ` [Qemu-arm] " Peter Maydell
2019-10-08 7:01 ` Xiang Zheng
2019-09-06 8:31 ` [Qemu-devel] [PATCH v18 5/6] target-arm: kvm64: inject synchronous External Abort Xiang Zheng
2019-09-27 13:33 ` Peter Maydell
2019-10-08 8:05 ` Xiang Zheng
2019-09-06 8:31 ` [Qemu-devel] [PATCH v18 6/6] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Xiang Zheng
2019-09-27 13:57 ` Peter Maydell [this message]
2019-10-08 12:42 ` Xiang Zheng
2019-09-17 12:39 ` [Qemu-devel] [PATCH v18 0/6] Add ARMv8 RAS virtualization support in QEMU Xiang Zheng
2019-09-20 2:07 ` gengdongjiu
2019-09-27 14:03 ` [Qemu-arm] " Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAFEAcA9Y3J8uRDN+HQO74-codKhoj5CyPW=9q3GwH8Mk_PNYTA@mail.gmail.com' \
--to=peter.maydell@linaro.org \
--cc=ehabkost@redhat.com \
--cc=gengdongjiu@huawei.com \
--cc=imammedo@redhat.com \
--cc=james.morse@arm.com \
--cc=jonathan.cameron@huawei.com \
--cc=kvm@vger.kernel.org \
--cc=lersek@redhat.com \
--cc=linuxarm@huawei.com \
--cc=mst@redhat.com \
--cc=mtosatti@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=shannon.zhaosl@gmail.com \
--cc=wanghaibin.wang@huawei.com \
--cc=xuwei5@huawei.com \
--cc=zhengxiang9@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).