From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0B74C4708F for ; Fri, 4 Jun 2021 09:01:53 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 76BBF613EA for ; Fri, 4 Jun 2021 09:01:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 76BBF613EA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:48988 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lp5iC-0003TS-Cq for qemu-devel@archiver.kernel.org; Fri, 04 Jun 2021 05:01:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36890) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lp5h7-0002US-Fc for qemu-devel@nongnu.org; Fri, 04 Jun 2021 05:00:45 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]:41560) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lp5h5-0007t6-8n for qemu-devel@nongnu.org; Fri, 04 Jun 2021 05:00:44 -0400 Received: by mail-pj1-x1033.google.com with SMTP id b15-20020a17090a550fb029015dad75163dso5522371pji.0 for ; Fri, 04 Jun 2021 02:00:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=FyWepY4JjoUfuJ0cMElhDPZ/gV3eWFbuJU2+7J1omBg=; b=c0xvKqFQ//gW4YwFjlC7P897izgTCE73MjRlNgKa42VTz5R/vlWimkWNr1u9u0XBuE jmRhrp8NeMIQLndkc5PeS/bgKzHYypeWhSb/loxUYDJpoiJWeUdZ115wbf/4l1AqEVyt ximiEWedOeIJyLKImYtVZFH1eoF8ceTI6fXTeuWg4edBwZ/0poAPkR3+M3tM3lZVkaQw ZprC+bCspJP19AbO32jI7g9S/emQjJCxj3gTYUttJ5nSl/2GwC4EVNiOy0ldfHrRZRZW qG8qZqdGiB0cONk64+Bsi9+V8aSqibaHaSgi2SI1Onca3GoYllRQvtge6WzRAG7VFUh4 dPFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=FyWepY4JjoUfuJ0cMElhDPZ/gV3eWFbuJU2+7J1omBg=; b=iJ7v5E0KmStYliYvZtHHXwv8ovVGmBo2YxplKUBFnszLNw6HyJVbTuh81r+ONt+vDj Pl5ukDjBgHmBJnwBmRCUGMUr30tuuOM329qCBh1mcKaBeLGCj2afnytDMrVUJozYMSn2 RrmIt31Hpnp8FQc5EOSuu/m0PgUiurQ6hnO3Wi4ncxpU7TpuJ4ryfNGRFPk5+/tViJyh MJIylsoOp45tiqGqR5/mL8ltO37cmvphvyEfr7bkhaRFlULnVO2m40KBvWtHUc6io72p 8DiP3gcVZucbISCtp56EJ+gdUxwDZc92HMLO1+HlC2meWjacA3XQI8Ow9dR0ex8lTV0n K6IQ== X-Gm-Message-State: AOAM530mX7QH5KpoXDHajP8wWRvjgcNkDrZg5O7QpyNx2/M9bx1gSDpE 29nOPpcOL9SLf7D41GbCRcco5NxTLou5BQf0Z3bghA== X-Google-Smtp-Source: ABdhPJwb33cGxn1NBA8Hi/XeXHHwQfnXy3mrDqo/dmZDkH9GygH465wggfdgcaQ+GqGZyNkrDSooyewCVQBMeGIlXKs= X-Received: by 2002:a17:902:f68c:b029:102:e6b5:f8c8 with SMTP id l12-20020a170902f68cb0290102e6b5f8c8mr3412678plg.70.1622797241579; Fri, 04 Jun 2021 02:00:41 -0700 (PDT) MIME-Version: 1.0 References: <65323e52-789c-567a-3446-ccb7709877e2@linaro.org> In-Reply-To: From: Peter Maydell Date: Fri, 4 Jun 2021 10:00:07 +0100 Message-ID: Subject: Re: [RFC] Adding the A64FX's HPC funtions. To: "ishii.shuuichir@fujitsu.com" Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=peter.maydell@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "qemu-arm@nongnu.org" , Richard Henderson , "qemu-devel@nongnu.org" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, 4 Jun 2021 at 09:29, ishii.shuuichir@fujitsu.com wrote: > > Hi, Richard. > > > Well, Peter disagreed with having them enabled by default in -cpu max, so we > > might need at least one extra property. I see no reason to have three > > properties -- one property a64fx-hpc should be sufficient. But we might not > > want any command-line properties, see below... > > I understood. > > > For comparison, in the Arm Cortex-A76 manual, > > https://developer.arm.com/documentation/100798/0301/ > > section B2.4 "AArch64 registers by functional group", there is a concise > > listing of all of the system registers and their reset values. > > Thank you for the information. > > > The most important of these for QEMU to create '-cpu a64fx' are the > > ID_AA64{ISAR,MMFR,PFR} and MIDR values. These values determine all of > > the > > standard architectural features, > > The values of ID_AA64{ISAR,MMFR,PFR} and MIDR are not listed in the specifications published at this time. > Of course, they are listed in the A64FX specification document managed within Fujitsu, > but we cannot tell how far these setting values can be disclosed > without checking with the A64FX specification staff within Fujitsu. If somebody has access to A64 hardware they could write a minor kernel patch to just print the values... -- PMM