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Fri, 22 Jan 2021 04:02:18 -0800 (PST) MIME-Version: 1.0 References: <20210115224645.1196742-1-richard.henderson@linaro.org> <20210115224645.1196742-13-richard.henderson@linaro.org> In-Reply-To: From: Peter Maydell Date: Fri, 22 Jan 2021 12:02:07 +0000 Message-ID: Subject: Re: [PATCH v3 12/21] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE To: Richard Henderson Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=peter.maydell@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, 22 Jan 2021 at 11:53, Peter Maydell wrote: > The kernel's "untagged_addr()" implementation: > https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/asm/memory.h#L203 > slightly confusingly does "untag the addr if it's in the userspace > half, leave the tag bits alone if in the kernel half". ...and a kernel person has just explained to me the rationale: TBI is always enabled for userspace and never for the kernel, so "always clear tag bits for a userspace address, never clear them for a kernel address" is the right behaviour. I think we should have the same logic. -- PMM