From: Peter Maydell <peter.maydell@linaro.org>
To: Alexander Graf <graf@amazon.com>
Cc: Hendrik Borghorst <hborghor@amazon.de>,
qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH] pl031: Expose RTCICR as proper WC register
Date: Tue, 12 Nov 2019 11:57:13 +0000 [thread overview]
Message-ID: <CAFEAcA_kwscZRqK5wTRu5WLkixGYbdV0c7mZMV6n+40DOS0-Mg@mail.gmail.com> (raw)
In-Reply-To: <246a7cd4-7c39-c92e-05c3-1045bca2c114@amazon.com>
On Tue, 12 Nov 2019 at 07:28, Alexander Graf <graf@amazon.com> wrote:
>
> Hey Peter,
>
> On 08.11.19 17:58, Peter Maydell wrote:
> > Did you find this because you had a guest that assumed the
> > other behaviour? This bug has been in QEMU for a very long time,
> > and it seems odd for a guest to deliberately perform an action
> > (writing 0) which is documented to have no effect on the device...
>
> We found this bug by trying to find justification for the behavior in
> the spec and apparently my spec reading skills were lacking. I could not
> find the reference you cited above.
>
> So no, I did not see any guest breakage.
>
> I still think that being consistent with the actual PL031 spec is
> preferable though. If any real world guest breaks because of this, we
> can still revert this patch and document the exact breakage in the
> comment instead.
Yeah, I agree; I'm essentially just gathering material
for the commit message here. (The gold standard would be
to go find some hardware with a real pl031 and prod it
to confirm behaviour, but that's more effort than really
seems justified to me.)
thanks
-- PMM
next prev parent reply other threads:[~2019-11-12 11:58 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-04 11:52 [PATCH] pl031: Expose RTCICR as proper WC register Alexander Graf
2019-11-08 15:58 ` Peter Maydell
2019-11-12 7:28 ` Alexander Graf
2019-11-12 11:57 ` Peter Maydell [this message]
2019-11-14 13:42 ` Peter Maydell
2019-11-14 20:45 ` Alexander Graf
2019-11-14 21:01 ` Peter Maydell
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