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From: Christopher Caulfield <ctcaulfield@gmail.com>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	qemu-devel@nongnu.org, alexsmendez@live.com
Subject: Re: QEMU on x64
Date: Mon, 2 Aug 2021 18:34:04 -0700	[thread overview]
Message-ID: <CAGu1Vjix18j69s2n4VjB=zJWvH2rKUeXhhinboCVx0Ba9vuPCw@mail.gmail.com> (raw)
In-Reply-To: <87zgtzg33v.fsf@linaro.org>

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Thanks folks! I went ahead and made a feature/issue request based on
Paolo's suggestion:
QEMU registers support on x64 (#510) · Issues · QEMU / QEMU · GitLab
<https://gitlab.com/qemu-project/qemu/-/issues/510>

Please let me know if someone has the cycles to support this.

-Christopher

On Mon, Aug 2, 2021 at 10:37 AM Alex Bennée <alex.bennee@linaro.org> wrote:

>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > On Fri, 30 Jul 2021 at 19:05, Christopher Caulfield
> > <ctcaulfield@gmail.com> wrote:
> >> This is Christopher from the debugging experiences team at Microsoft
> focused on kernel debugging. I am reaching out with a few questions about
> QEMU on x64.
> >>
> >> Is it possible for the QEMU-x86-64 GDB Server to send the full set
> >> of x64 system registers (whether they are included in a separated
> >> system xml file or as part of the core registers xml file)?
> >
> > Do you mean "is it possible for somebody to write code for
> > QEMU to make it do that", or "does QEMU do it today if you pass
> > it the right command line option" ? The answer to the former
> > is "yes", to the latter "no". (If you want the debugger to
> > be able to write to the system registers this might be a little
> > trickier, mostly in terms of "auditing the code to make sure this
> > can't confuse QEMU if you change some sysreg under its feet.".)
> >
> >> e.g. System registers missing from i386-64bit.xml file
> >
> >> DWORD64 IDTBase;
> >> DWORD64 IDTLimit;
> >> DWORD64 GDTBase;
> >> DWORD64 GDTLimit;
> >> DWORD SelLDT;
> >> SEG64_DESC_INFO SegLDT;
> >> DWORD SelTSS;
> >> SEG64_DESC_INFO SegTSS;
> >>
> >> How can I access x64 MSR registers by using the QEMU-x86-64 GDB server?
> >>
> >> #define MSR_EFER 0xc0000080 // extended function enable register
> >
> > EFER is in the xml ("x64_efer") so should be already accessible.
> > For anything else you're going to need to write some code to
> > make it happen.
> >
> >>is there any plan to support reading/writing to MSRs via QEMU-x86-64
> >GDB server?
>
> Not at the moment but I am keen to see any eventual solution try to be
> generic rather than hardwired for one architecture. The ARM code
> currently builds custom XML from it's register descriptors to expose
> it's MSR registers to the gdbstub. Ideally architecture front ends
> should register their registers with a new subsystem which can then do
> the glue between gdbstub as well as other systems that also care about
> register values (logging, HMP, TCG plugins).
>
> That said I'm not going to block any patches that just fix up the
> current XML and target/i386/gdbstub code. I'm not familiar enough with
> what the internal register representation state is for x86 w.r.t to TCG
> and hypervisor based running modes.
>
> > Not that I know of. We'd be happy to review patches if you want to
> > write them.
> >
> > thanks
> > -- PMM
>
>
> --
> Alex Bennée
>

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  reply	other threads:[~2021-08-03  1:35 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-30 17:36 QEMU on x64 Christopher Caulfield
2021-07-30 18:13 ` Peter Maydell
2021-08-02 17:27   ` Alex Bennée
2021-08-03  1:34     ` Christopher Caulfield [this message]
2021-11-12 23:18       ` Christopher Caulfield
2021-08-02  9:05 ` Paolo Bonzini

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