From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6234C4360C for ; Wed, 9 Oct 2019 01:10:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8E436206C2 for ; Wed, 9 Oct 2019 01:10:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JD4dGOD2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8E436206C2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:38406 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iI0UL-0002Lh-PR for qemu-devel@archiver.kernel.org; Tue, 08 Oct 2019 21:10:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40110) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iI0TJ-0001Vn-Fx for qemu-devel@nongnu.org; Tue, 08 Oct 2019 21:08:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iI0TI-00012d-3A for qemu-devel@nongnu.org; Tue, 08 Oct 2019 21:08:57 -0400 Received: from mail-oi1-x243.google.com ([2607:f8b0:4864:20::243]:37101) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iI0TH-00012W-Tl; Tue, 08 Oct 2019 21:08:56 -0400 Received: by mail-oi1-x243.google.com with SMTP id i16so371395oie.4; Tue, 08 Oct 2019 18:08:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Qa0hiKGQ1LdAXEe+gYjM+shYjUAw3dBrIwlAh0NC/L4=; b=JD4dGOD2QT2lhijBCyN6zEg/oE0zUOGa3vJb5lSgdbP0V4XFUv3riGK0iRyoNiVKwb xFQgjI9H+V1Xs+ECjbTyRoQ4tVnQ862mUj9S3Ommg2mtO9DuihJ9rnYMNbTAVXl8SaUR ljX43we1z68IE3YQi2msRO5rdRbYGnUB6hifgonpTx5eN/5Q07vFUYwiYqe7RNHzAcUR 2zTRo7RKUZgH3OAFkpKopb5Z67ZaVSSd+0ja4J7KDXyKlMamhy1KisSfFGej3ZGhiFVu iZdO3XIhbwVKMRWVk5S1ZdeCZSPpntbDzMDaaV0knG4DxoBRhszNo8GJymw84PBbVoqo U4GA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Qa0hiKGQ1LdAXEe+gYjM+shYjUAw3dBrIwlAh0NC/L4=; b=p3WWGzLBO0Uxbir+ymJj56YJDCWWuRfoEZUTnDFlme7F+SIUFJbDFYSwX21WZlKBKV YxP0sTnmzfSg9O2DbT9SjY1aWYOGLgvK9Mspow3SrTLqFyQnglt3kQ6V7bvpGpcRT8m+ jlPcc0TxdBhCfsNzEtnjbPtxYVCXLyDp2M4s9CkG4SgB7BDB1JLcuGchULCvNcqzQGBR PdayB3li/0B2wrLWSJqthJoSaRtHxmWIgI/6BuKVIpvJhy9juw5R7nsAWBeO1wNytitl uDJ1RuOAz5PB/GnFdJsirSJSYGYoPmsWLdessRcCr+FcRfRH3IAkD22/sVIgvR6x6VyB gFvg== X-Gm-Message-State: APjAAAWmMAlkyLsffe2zRjLI28SbKsJszgr9bMizhq9OwkJu2KMDXr2p cfJEOJz/3GA4bJtwXDAehVQE4gBiV4yTlcFVKl4= X-Google-Smtp-Source: APXvYqwUiRpbgr4QrDAD5Sx5tqbS2NlHm+PxxQH5xnE6JhPvip8bMNrAJe2kfI/6XV19Bpc8QlgyCDiQDFVUvF8O+Cw= X-Received: by 2002:aca:f1d7:: with SMTP id p206mr377192oih.97.1570583335172; Tue, 08 Oct 2019 18:08:55 -0700 (PDT) MIME-Version: 1.0 References: <20191008142539.7793-1-philmd@redhat.com> <20191008142539.7793-4-philmd@redhat.com> In-Reply-To: <20191008142539.7793-4-philmd@redhat.com> From: Li Qiang Date: Wed, 9 Oct 2019 09:08:18 +0800 Message-ID: Subject: Re: [PATCH v2 3/8] hw/ide/piix: Convert reset handler to DeviceReset To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="000000000000c87f7505946fedef" X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::243 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , qemu-block@nongnu.org, "Michael S. Tsirkin" , Aleksandar Rikalo , Qemu Developers , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Aleksandar Markovic , =?UTF-8?B?TWFyYy1BbmRyw6kgTHVyZWF1?= , Igor Mammedov , John Snow Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --000000000000c87f7505946fedef Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Philippe Mathieu-Daud=C3=A9 =E4=BA=8E2019=E5=B9=B410=E6= =9C=888=E6=97=A5=E5=91=A8=E4=BA=8C =E4=B8=8B=E5=8D=8810:32=E5=86=99=E9=81= =93=EF=BC=9A > The PIIX3/IDE is a PCI device within the PIIX3 chipset, it will be reset > when the PCI bus it stands on is reset. > > Convert its reset handler into a proper Device reset method. > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > hw/ide/piix.c | 8 +++----- > 1 file changed, 3 insertions(+), 5 deletions(-) > > diff --git a/hw/ide/piix.c b/hw/ide/piix.c > index fba6bc8bff..18b2c3b722 100644 > --- a/hw/ide/piix.c > +++ b/hw/ide/piix.c > @@ -30,7 +30,6 @@ > #include "sysemu/block-backend.h" > #include "sysemu/blockdev.h" > #include "sysemu/dma.h" > -#include "sysemu/reset.h" > > #include "hw/ide/pci.h" > #include "trace.h" > @@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d) > } > } > > -static void piix3_reset(void *opaque) > +static void piix3_ide_reset(DeviceState *dev) > { > - PCIIDEState *d =3D opaque; > + PCIIDEState *d =3D PCI_IDE(dev); > PCIDevice *pd =3D PCI_DEVICE(d); > uint8_t *pci_conf =3D pd->config; > int i; > @@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Erro= r > **errp) > > pci_conf[PCI_CLASS_PROG] =3D 0x80; // legacy ATA mode > > - qemu_register_reset(piix3_reset, d); > - > bmdma_setup_bar(d); > pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); > > @@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, > void *data) > DeviceClass *dc =3D DEVICE_CLASS(klass); > PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); > > + dc->reset =3D piix3_ide_reset; > k->realize =3D pci_piix_ide_realize; > k->exit =3D pci_piix_ide_exitfn; > k->vendor_id =3D PCI_VENDOR_ID_INTEL; > -- > Shouldn't we also add the reset callback for piix4 ide device? Thanks, Li Qiang > 2.21.0 > > > --000000000000c87f7505946fedef Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com> =E4=BA=8E2019=E5= =B9=B410=E6=9C=888=E6=97=A5=E5=91=A8=E4=BA=8C =E4=B8=8B=E5=8D=8810:32=E5=86= =99=E9=81=93=EF=BC=9A
The PIIX3/IDE is a PCI device within the PIIX3 chipset, it will be re= set
when the PCI bus it stands on is reset.

Convert its reset handler into a proper Device reset method.

Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com>
---
=C2=A0hw/ide/piix.c | 8 +++-----
=C2=A01 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index fba6bc8bff..18b2c3b722 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -30,7 +30,6 @@
=C2=A0#include "sysemu/block-backend.h"
=C2=A0#include "sysemu/blockdev.h"
=C2=A0#include "sysemu/dma.h"
-#include "sysemu/reset.h"

=C2=A0#include "hw/ide/pci.h"
=C2=A0#include "trace.h"
@@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d)
=C2=A0 =C2=A0 =C2=A0}
=C2=A0}

-static void piix3_reset(void *opaque)
+static void piix3_ide_reset(DeviceState *dev)
=C2=A0{
-=C2=A0 =C2=A0 PCIIDEState *d =3D opaque;
+=C2=A0 =C2=A0 PCIIDEState *d =3D PCI_IDE(dev);
=C2=A0 =C2=A0 =C2=A0PCIDevice *pd =3D PCI_DEVICE(d);
=C2=A0 =C2=A0 =C2=A0uint8_t *pci_conf =3D pd->config;
=C2=A0 =C2=A0 =C2=A0int i;
@@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error = **errp)

=C2=A0 =C2=A0 =C2=A0pci_conf[PCI_CLASS_PROG] =3D 0x80; // legacy ATA mode
-=C2=A0 =C2=A0 qemu_register_reset(piix3_reset, d);
-
=C2=A0 =C2=A0 =C2=A0bmdma_setup_bar(d);
=C2=A0 =C2=A0 =C2=A0pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &am= p;d->bmdma_bar);

@@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, vo= id *data)
=C2=A0 =C2=A0 =C2=A0DeviceClass *dc =3D DEVICE_CLASS(klass);
=C2=A0 =C2=A0 =C2=A0PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass);

+=C2=A0 =C2=A0 dc->reset =3D piix3_ide_reset;
=C2=A0 =C2=A0 =C2=A0k->realize =3D pci_piix_ide_realize;
=C2=A0 =C2=A0 =C2=A0k->exit =3D pci_piix_ide_exitfn;
=C2=A0 =C2=A0 =C2=A0k->vendor_id =3D PCI_VENDOR_ID_INTEL;
--


Shouldn't we als= o add the reset callback for piix4 ide device?

Tha= nks,
Li Qiang

=C2=A0
2.21.0


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