From: Alistair Francis <alistair23@gmail.com>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: figlesia@xilinx.com, "Peter Maydell" <peter.maydell@linaro.org>,
"Edgar Iglesias" <edgar.iglesias@xilinx.com>,
"Sai Pavan Boddu" <sai.pavan.boddu@xilinx.com>,
"Francisco Iglesias" <frasse.iglesias@gmail.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Richard Henderson" <richard.henderson@linaro.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"KONRAD Frederic" <frederic.konrad@adacore.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Luc Michel" <luc.michel@greensocs.com>
Subject: Re: [PATCH v1 1/3] target/microblaze: Plug temp leaks for loads/stores
Date: Wed, 6 Nov 2019 13:55:31 -0800 [thread overview]
Message-ID: <CAKmqyKM1K9O++2rRK7Pj3PdQ6YZ53NQ_WxEkZFori=9Q0-_jkg@mail.gmail.com> (raw)
In-Reply-To: <20191106141424.27244-2-edgar.iglesias@gmail.com>
On Wed, Nov 6, 2019 at 6:14 AM Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Plug TCG temp leaks for loads/stores.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/microblaze/translate.c | 30 ++++++++++++++++++++++++------
> 1 file changed, 24 insertions(+), 6 deletions(-)
>
> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index 761f535357..ba143ede5f 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -967,12 +967,14 @@ static void dec_load(DisasContext *dc)
> 10 -> 10
> 11 -> 00 */
> TCGv low = tcg_temp_new();
> + TCGv t3 = tcg_const_tl(3);
>
> tcg_gen_andi_tl(low, addr, 3);
> - tcg_gen_sub_tl(low, tcg_const_tl(3), low);
> + tcg_gen_sub_tl(low, t3, low);
> tcg_gen_andi_tl(addr, addr, ~3);
> tcg_gen_or_tl(addr, addr, low);
> tcg_temp_free(low);
> + tcg_temp_free(t3);
> break;
> }
>
> @@ -1006,9 +1008,16 @@ static void dec_load(DisasContext *dc)
> tcg_gen_qemu_ld_i32(v, addr, mem_index, mop);
>
> if ((dc->cpu->env.pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
> + TCGv_i32 t0 = tcg_const_i32(0);
> + TCGv_i32 treg = tcg_const_i32(dc->rd);
> + TCGv_i32 tsize = tcg_const_i32(size - 1);
> +
> tcg_gen_movi_i64(cpu_SR[SR_PC], dc->pc);
> - gen_helper_memalign(cpu_env, addr, tcg_const_i32(dc->rd),
> - tcg_const_i32(0), tcg_const_i32(size - 1));
> + gen_helper_memalign(cpu_env, addr, treg, t0, tsize);
> +
> + tcg_temp_free_i32(t0);
> + tcg_temp_free_i32(treg);
> + tcg_temp_free_i32(tsize);
> }
>
> if (ex) {
> @@ -1100,12 +1109,14 @@ static void dec_store(DisasContext *dc)
> 10 -> 10
> 11 -> 00 */
> TCGv low = tcg_temp_new();
> + TCGv t3 = tcg_const_tl(3);
>
> tcg_gen_andi_tl(low, addr, 3);
> - tcg_gen_sub_tl(low, tcg_const_tl(3), low);
> + tcg_gen_sub_tl(low, t3, low);
> tcg_gen_andi_tl(addr, addr, ~3);
> tcg_gen_or_tl(addr, addr, low);
> tcg_temp_free(low);
> + tcg_temp_free(t3);
> break;
> }
>
> @@ -1124,6 +1135,10 @@ static void dec_store(DisasContext *dc)
>
> /* Verify alignment if needed. */
> if ((dc->cpu->env.pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
> + TCGv_i32 t1 = tcg_const_i32(1);
> + TCGv_i32 treg = tcg_const_i32(dc->rd);
> + TCGv_i32 tsize = tcg_const_i32(size - 1);
> +
> tcg_gen_movi_i64(cpu_SR[SR_PC], dc->pc);
> /* FIXME: if the alignment is wrong, we should restore the value
> * in memory. One possible way to achieve this is to probe
> @@ -1131,8 +1146,11 @@ static void dec_store(DisasContext *dc)
> * the alignment checks in between the probe and the mem
> * access.
> */
> - gen_helper_memalign(cpu_env, addr, tcg_const_i32(dc->rd),
> - tcg_const_i32(1), tcg_const_i32(size - 1));
> + gen_helper_memalign(cpu_env, addr, treg, t1, tsize);
> +
> + tcg_temp_free_i32(t1);
> + tcg_temp_free_i32(treg);
> + tcg_temp_free_i32(tsize);
> }
>
> if (ex) {
> --
> 2.20.1
>
>
next prev parent reply other threads:[~2019-11-06 22:04 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-06 14:14 [PATCH v1 0/3] target/microblaze: Plug tcg temp leaks Edgar E. Iglesias
2019-11-06 14:14 ` [PATCH v1 1/3] target/microblaze: Plug temp leaks for loads/stores Edgar E. Iglesias
2019-11-06 14:32 ` Philippe Mathieu-Daudé
2019-11-06 14:37 ` Luc Michel
2019-11-06 21:55 ` Alistair Francis [this message]
2019-11-07 14:19 ` Richard Henderson
2019-11-08 12:36 ` Edgar E. Iglesias
2019-11-06 14:14 ` [PATCH v1 2/3] target/microblaze: Plug temp leaks with delay slot setup Edgar E. Iglesias
2019-11-06 14:33 ` Philippe Mathieu-Daudé
2019-11-06 14:41 ` Luc Michel
2019-11-06 21:56 ` Alistair Francis
2019-11-07 14:21 ` Richard Henderson
2019-11-06 14:14 ` [PATCH v1 3/3] target/microblaze: Plug temp leak around eval_cond_jmp() Edgar E. Iglesias
2019-11-06 14:32 ` Philippe Mathieu-Daudé
2019-11-06 14:42 ` Luc Michel
2019-11-06 21:57 ` Alistair Francis
2019-11-07 14:22 ` Richard Henderson
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