Re: [PATCH v5 23/31] target/riscv: Restrict has_work() handler to sysemu and TCG

[Alistair Francis <alistair23@gmail.com>]

On Tue, Sep 21, 2021 at 8:09 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Restrict has_work() to TCG sysemu.
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 13575c14085..abb555a8bdb 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -335,9 +335,9 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs,
>      env->pc = tb->pc;
>  }
>
> +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
>  static bool riscv_cpu_has_work(CPUState *cs)
>  {
> -#ifndef CONFIG_USER_ONLY
>      RISCVCPU *cpu = RISCV_CPU(cs);
>      CPURISCVState *env = &cpu->env;
>      /*
> @@ -345,10 +345,8 @@ static bool riscv_cpu_has_work(CPUState *cs)
>       * mode and delegation registers, but respect individual enables
>       */
>      return (env->mip & env->mie) != 0;
> -#else
> -    return true;
> -#endif
>  }
> +#endif /* CONFIG_TCG && !CONFIG_USER_ONLY */
>
>  void restore_state_to_opc(CPURISCVState *env, TranslationBlock *tb,
>                            target_ulong *data)
> @@ -647,6 +645,7 @@ static const struct TCGCPUOps riscv_tcg_ops = {
>      .tlb_fill = riscv_cpu_tlb_fill,
>
>  #ifndef CONFIG_USER_ONLY
> +    .has_work = riscv_cpu_has_work,
>      .cpu_exec_interrupt = riscv_cpu_exec_interrupt,
>      .do_interrupt = riscv_cpu_do_interrupt,
>      .do_transaction_failed = riscv_cpu_do_transaction_failed,
> @@ -666,7 +665,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
>      device_class_set_parent_reset(dc, riscv_cpu_reset, &mcc->parent_reset);
>
>      cc->class_by_name = riscv_cpu_class_by_name;
> -    cc->has_work = riscv_cpu_has_work;
>      cc->dump_state = riscv_cpu_dump_state;
>      cc->set_pc = riscv_cpu_set_pc;
>      cc->gdb_read_register = riscv_cpu_gdb_read_register;
> --
> 2.31.1
>
>