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X-Received-From: 2a00:1450:4864:20::142 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?Q?Zolt=C3=A1n_Baldaszti?= , Paolo Bonzini , Alistair Francis , "qemu-devel@nongnu.org Developers" , Andrew Baumann , Esteban Bosse , Cleber Rosa , qemu-arm , Clement Deschamps , =?UTF-8?B?TWFyYy1BbmRyw6kgTHVyZWF1?= , Laurent Bonnans , Cheng Xiang , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Pekka Enberg , Guenter Roeck , Eduardo Habkost Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Sep 26, 2019 at 10:40 AM Philippe Mathieu-Daud=C3=A9 wrote: > > The UART1 is part of the AUX peripheral, > the PCM_CLOCK (yet unimplemented) is part of the CPRMAN. > > Reviewed-by: Peter Maydell > Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Alistair > --- > I dunno if this is OK to do that since the header has: > > * These definitions are derived from those in Raspbian Linux at > * arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h > * where they carry the following notice: > * > * Copyright (C) 2010 Broadcom > --- > hw/arm/bcm2835_peripherals.c | 7 ++++--- > hw/arm/bcm2836.c | 2 +- > include/hw/arm/raspi_platform.h | 16 +++++++--------- > 3 files changed, 12 insertions(+), 13 deletions(-) > > diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c > index 8984e2e91f..1bd2ff41d5 100644 > --- a/hw/arm/bcm2835_peripherals.c > +++ b/hw/arm/bcm2835_peripherals.c > @@ -165,7 +165,8 @@ static void bcm2835_peripherals_realize(DeviceState *= dev, Error **errp) > sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0)); > sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0, > qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, > - INTERRUPT_UART)); > + INTERRUPT_UART0)); > + > /* AUX / UART1 */ > qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1)); > > @@ -175,7 +176,7 @@ static void bcm2835_peripherals_realize(DeviceState *= dev, Error **errp) > return; > } > > - memory_region_add_subregion(&s->peri_mr, UART1_OFFSET, > + memory_region_add_subregion(&s->peri_mr, AUX_OFFSET, > sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0)); > sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0, > qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, > @@ -268,7 +269,7 @@ static void bcm2835_peripherals_realize(DeviceState *= dev, Error **errp) > return; > } > > - memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET, > + memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET, > sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); > sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, > qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, > diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c > index 493a913f89..723aef6bf5 100644 > --- a/hw/arm/bcm2836.c > +++ b/hw/arm/bcm2836.c > @@ -126,7 +126,7 @@ static void bcm2836_realize(DeviceState *dev, Error *= *errp) > > /* set periphbase/CBAR value for CPU-local registers */ > object_property_set_int(OBJECT(&s->cpus[n]), > - BCM2836_PERI_BASE + MCORE_OFFSET, > + BCM2836_PERI_BASE + MSYNC_OFFSET, > "reset-cbar", &err); > if (err) { > error_propagate(errp, err); > diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platf= orm.h > index 10083d33df..66969fac5d 100644 > --- a/include/hw/arm/raspi_platform.h > +++ b/include/hw/arm/raspi_platform.h > @@ -25,8 +25,7 @@ > #ifndef HW_ARM_RASPI_PLATFORM_H > #define HW_ARM_RASPI_PLATFORM_H > > -#define MCORE_OFFSET 0x0000 /* Fake frame buffer device > - * (the multicore sync block) *= / > +#define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */ > #define IC0_OFFSET 0x2000 > #define ST_OFFSET 0x3000 /* System Timer */ > #define MPHI_OFFSET 0x6000 /* Message-based Parallel Host = Intf. */ > @@ -37,9 +36,8 @@ > #define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */ > #define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Sem= aphores > * Doorbells & Mail= boxes */ > -#define PM_OFFSET 0x100000 /* Power Management, Reset cont= roller > - * and Watchdog registers */ > -#define PCM_CLOCK_OFFSET 0x101098 > +#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog *= / > +#define CM_OFFSET 0x101000 /* Clock Management */ > #define RNG_OFFSET 0x104000 > #define GPIO_OFFSET 0x200000 > #define UART0_OFFSET 0x201000 > @@ -47,11 +45,11 @@ > #define I2S_OFFSET 0x203000 > #define SPI0_OFFSET 0x204000 > #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ > -#define UART1_OFFSET 0x215000 > -#define EMMC_OFFSET 0x300000 > +#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */ > +#define EMMC1_OFFSET 0x300000 > #define SMI_OFFSET 0x600000 > #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */ > -#define USB_OFFSET 0x980000 /* DTC_OTG USB controller */ > +#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */ > #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 *= / > > /* GPU interrupts */ > @@ -112,7 +110,7 @@ > #define INTERRUPT_SPI 54 > #define INTERRUPT_I2SPCM 55 > #define INTERRUPT_SDIO 56 > -#define INTERRUPT_UART 57 > +#define INTERRUPT_UART0 57 > #define INTERRUPT_SLIMBUS 58 > #define INTERRUPT_VEC 59 > #define INTERRUPT_CPG 60 > -- > 2.20.1 > >