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From: Alistair Francis <alistair23@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH v3 02/66] hw/core: Make do_unaligned_access noreturn
Date: Thu, 19 Aug 2021 16:15:42 +1000	[thread overview]
Message-ID: <CAKmqyKNEVf84gV1ryrSVDaMuGZZCXTNq6pGszDuQkQ3y9o74SQ@mail.gmail.com> (raw)
In-Reply-To: <20210818191920.390759-3-richard.henderson@linaro.org>

On Thu, Aug 19, 2021 at 5:23 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> While we may have had some thought of allowing system-mode
> to return from this hook, we have no guests that require this.
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  include/hw/core/tcg-cpu-ops.h  | 3 ++-
>  target/alpha/cpu.h             | 4 ++--
>  target/arm/internals.h         | 2 +-
>  target/microblaze/cpu.h        | 2 +-
>  target/mips/tcg/tcg-internal.h | 4 ++--
>  target/nios2/cpu.h             | 4 ++--
>  target/ppc/internal.h          | 4 ++--
>  target/riscv/cpu.h             | 2 +-
>  target/s390x/s390x-internal.h  | 4 ++--
>  target/sh4/cpu.h               | 4 ++--
>  target/xtensa/cpu.h            | 4 ++--
>  target/hppa/cpu.c              | 7 ++++---
>  12 files changed, 23 insertions(+), 21 deletions(-)
>
> diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
> index eab27d0c03..ee0795def4 100644
> --- a/include/hw/core/tcg-cpu-ops.h
> +++ b/include/hw/core/tcg-cpu-ops.h
> @@ -72,10 +72,11 @@ struct TCGCPUOps {
>                                    MemTxResult response, uintptr_t retaddr);
>      /**
>       * @do_unaligned_access: Callback for unaligned access handling
> +     * The callback must exit via raising an exception.
>       */
>      void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
>                                  MMUAccessType access_type,
> -                                int mmu_idx, uintptr_t retaddr);
> +                                int mmu_idx, uintptr_t retaddr) QEMU_NORETURN;
>
>      /**
>       * @adjust_watchpoint_address: hack for cpu_check_watchpoint used by ARM
> diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
> index 82df108967..6eb3fcc63e 100644
> --- a/target/alpha/cpu.h
> +++ b/target/alpha/cpu.h
> @@ -283,8 +283,8 @@ hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>  int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
>  int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
>  void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
> -                                   MMUAccessType access_type,
> -                                   int mmu_idx, uintptr_t retaddr);
> +                                   MMUAccessType access_type, int mmu_idx,
> +                                   uintptr_t retaddr) QEMU_NORETURN;
>
>  #define cpu_list alpha_cpu_list
>  #define cpu_signal_handler cpu_alpha_signal_handler
> diff --git a/target/arm/internals.h b/target/arm/internals.h
> index cd2ea8a388..8a77929793 100644
> --- a/target/arm/internals.h
> +++ b/target/arm/internals.h
> @@ -594,7 +594,7 @@ bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx);
>  /* Raise a data fault alignment exception for the specified virtual address */
>  void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
>                                   MMUAccessType access_type,
> -                                 int mmu_idx, uintptr_t retaddr);
> +                                 int mmu_idx, uintptr_t retaddr) QEMU_NORETURN;
>
>  /* arm_cpu_do_transaction_failed: handle a memory system error response
>   * (eg "no device/memory present at address") by raising an external abort
> diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
> index e4bba8a755..620c3742e1 100644
> --- a/target/microblaze/cpu.h
> +++ b/target/microblaze/cpu.h
> @@ -359,7 +359,7 @@ void mb_cpu_do_interrupt(CPUState *cs);
>  bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
>  void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
>                                  MMUAccessType access_type,
> -                                int mmu_idx, uintptr_t retaddr);
> +                                int mmu_idx, uintptr_t retaddr) QEMU_NORETURN;
>  void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
>  hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
>                                          MemTxAttrs *attrs);
> diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
> index 81b14eb219..7ac1e578d1 100644
> --- a/target/mips/tcg/tcg-internal.h
> +++ b/target/mips/tcg/tcg-internal.h
> @@ -24,8 +24,8 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>                         MMUAccessType access_type, int mmu_idx,
>                         bool probe, uintptr_t retaddr);
>  void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
> -                                  MMUAccessType access_type,
> -                                  int mmu_idx, uintptr_t retaddr);
> +                                  MMUAccessType access_type, int mmu_idx,
> +                                  uintptr_t retaddr) QEMU_NORETURN;
>
>  const char *mips_exception_name(int32_t exception);
>
> diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
> index 2ab82fdc71..27227b1e88 100644
> --- a/target/nios2/cpu.h
> +++ b/target/nios2/cpu.h
> @@ -198,8 +198,8 @@ void dump_mmu(CPUNios2State *env);
>  void nios2_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
>  hwaddr nios2_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>  void nios2_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
> -                                   MMUAccessType access_type,
> -                                   int mmu_idx, uintptr_t retaddr);
> +                                   MMUAccessType access_type, int mmu_idx,
> +                                   uintptr_t retaddr) QEMU_NORETURN;
>
>  void do_nios2_semihosting(CPUNios2State *env);
>
> diff --git a/target/ppc/internal.h b/target/ppc/internal.h
> index f1fd3c8d04..d2163bf5a2 100644
> --- a/target/ppc/internal.h
> +++ b/target/ppc/internal.h
> @@ -213,8 +213,8 @@ void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
>
>  /* Raise a data fault alignment exception for the specified virtual address */
>  void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> -                                 MMUAccessType access_type,
> -                                 int mmu_idx, uintptr_t retaddr);
> +                                 MMUAccessType access_type, int mmu_idx,
> +                                 uintptr_t retaddr) QEMU_NORETURN;
>
>  /* translate.c */
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index bf1c899c00..a5b0047bfd 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -345,7 +345,7 @@ int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
>  hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>  void  riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
>                                      MMUAccessType access_type, int mmu_idx,
> -                                    uintptr_t retaddr);
> +                                    uintptr_t retaddr) QEMU_NORETURN;
>  bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>                          MMUAccessType access_type, int mmu_idx,
>                          bool probe, uintptr_t retaddr);
> diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h
> index 5506f185e8..96133ac2b6 100644
> --- a/target/s390x/s390x-internal.h
> +++ b/target/s390x/s390x-internal.h
> @@ -274,8 +274,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>                         MMUAccessType access_type, int mmu_idx,
>                         bool probe, uintptr_t retaddr);
>  void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> -                                   MMUAccessType access_type,
> -                                   int mmu_idx, uintptr_t retaddr);
> +                                   MMUAccessType access_type, int mmu_idx,
> +                                   uintptr_t retaddr) QEMU_NORETURN;
>
>
>  /* fpu_helper.c */
> diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
> index 01c4344082..a9191951f8 100644
> --- a/target/sh4/cpu.h
> +++ b/target/sh4/cpu.h
> @@ -211,8 +211,8 @@ hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>  int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
>  int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
>  void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
> -                                    MMUAccessType access_type,
> -                                    int mmu_idx, uintptr_t retaddr);
> +                                    MMUAccessType access_type, int mmu_idx,
> +                                    uintptr_t retaddr) QEMU_NORETURN;
>
>  void sh4_translate_init(void);
>  int cpu_sh4_signal_handler(int host_signum, void *pinfo,
> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
> index 2345cb59c7..aa9c77d719 100644
> --- a/target/xtensa/cpu.h
> +++ b/target/xtensa/cpu.h
> @@ -579,8 +579,8 @@ void xtensa_count_regs(const XtensaConfig *config,
>  int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
>  int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
>  void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
> -                                    MMUAccessType access_type,
> -                                    int mmu_idx, uintptr_t retaddr);
> +                                    MMUAccessType access_type, int mmu_idx,
> +                                    uintptr_t retaddr) QEMU_NORETURN;
>
>  #define cpu_signal_handler cpu_xtensa_signal_handler
>  #define cpu_list xtensa_cpu_list
> diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
> index 2eace4ee12..c2c56e7635 100644
> --- a/target/hppa/cpu.c
> +++ b/target/hppa/cpu.c
> @@ -72,9 +72,10 @@ static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
>  }
>
>  #ifndef CONFIG_USER_ONLY
> -static void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> -                                         MMUAccessType access_type,
> -                                         int mmu_idx, uintptr_t retaddr)
> +static void QEMU_NORETURN
> +hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> +                             MMUAccessType access_type, int mmu_idx,
> +                             uintptr_t retaddr)
>  {
>      HPPACPU *cpu = HPPA_CPU(cs);
>      CPUHPPAState *env = &cpu->env;
> --
> 2.25.1
>
>


  reply	other threads:[~2021-08-19  6:17 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-18 19:18 [PATCH v3 00/66] Unaligned access for user-only Richard Henderson
2021-08-18 19:18 ` [PATCH v3 01/66] util: Suppress -Wstringop-overflow in qemu_thread_start Richard Henderson
2021-08-19 15:13   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 02/66] hw/core: Make do_unaligned_access noreturn Richard Henderson
2021-08-19  6:15   ` Alistair Francis [this message]
2021-08-18 19:18 ` [PATCH v3 03/66] hw/core: Make do_unaligned_access available to user-only Richard Henderson
2021-08-18 19:18 ` [PATCH v3 04/66] target/alpha: Implement do_unaligned_access for user-only Richard Henderson
2021-08-18 19:18 ` [PATCH v3 05/66] target/arm: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 06/66] target/hppa: " Richard Henderson
2021-08-19 15:32   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 07/66] target/microblaze: Do not set MO_ALIGN " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 08/66] target/mips: Implement do_unaligned_access " Richard Henderson
2021-08-19 15:34   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 09/66] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-08-19 15:39   ` Peter Maydell
2021-08-19 19:13     ` Richard Henderson
2021-08-18 19:18 ` [PATCH v3 10/66] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-08-19 15:41   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 11/66] target/ppc: Implement do_unaligned_access for user-only Richard Henderson
2021-08-19 15:44   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 12/66] target/riscv: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 13/66] target/s390x: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 14/66] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-08-18 19:18 ` [PATCH v3 15/66] target/sh4: Implement do_unaligned_access for user-only Richard Henderson
2021-08-19 15:46   ` Peter Maydell
2021-08-19 19:21     ` Richard Henderson
2021-08-18 19:18 ` [PATCH v3 16/66] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-08-18 19:18 ` [PATCH v3 17/66] target/sparc: Split out build_sfsr Richard Henderson
2021-08-18 19:18 ` [PATCH v3 18/66] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-08-18 19:18 ` [PATCH v3 19/66] target/sparc: Implement do_unaligned_access for user-only Richard Henderson
2021-08-18 19:18 ` [PATCH v3 20/66] target/xtensa: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 21/66] accel/tcg: Report unaligned atomics " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 22/66] accel/tcg: Drop signness in tracing in cputlb.c Richard Henderson
2021-08-18 21:14   ` Philippe Mathieu-Daudé
2021-08-18 19:18 ` [PATCH v3 23/66] tcg: Expand MO_SIZE to 3 bits Richard Henderson
2021-08-19  6:17   ` Alistair Francis
2021-08-18 19:18 ` [PATCH v3 24/66] tcg: Rename TCGMemOpIdx to MemOpIdx Richard Henderson
2021-08-19  6:17   ` Alistair Francis
2021-08-18 19:18 ` [PATCH v3 25/66] tcg: Split out MemOpIdx to exec/memopidx.h Richard Henderson
2021-08-18 19:18 ` [PATCH v3 26/66] trace/mem: Pass MemOpIdx to trace_mem_get_info Richard Henderson
2021-08-19 15:49   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 27/66] accel/tcg: Pass MemOpIdx to atomic_trace_*_post Richard Henderson
2021-08-18 19:18 ` [PATCH v3 28/66] plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb Richard Henderson
2021-08-30 21:42   ` Philippe Mathieu-Daudé
2021-08-18 19:18 ` [PATCH v3 29/66] trace: Split guest_mem_before Richard Henderson
2021-08-18 19:18 ` [PATCH v3 30/66] target/arm: Use MO_128 for 16 byte atomics Richard Henderson
2021-08-18 19:18 ` [PATCH v3 31/66] target/i386: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 32/66] target/ppc: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 33/66] target/s390x: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 34/66] target/hexagon: Implement cpu_mmu_index Richard Henderson
2021-08-18 19:18 ` [PATCH v3 35/66] accel/tcg: Add cpu_{ld,st}*_mmu interfaces Richard Henderson
2021-08-19 15:57   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 36/66] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h Richard Henderson
2021-08-18 19:18 ` [PATCH v3 37/66] target/mips: Use cpu_*_data_ra for msa load/store Richard Henderson
2021-08-18 19:18 ` [PATCH v3 38/66] target/mips: Use 8-byte memory ops " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 39/66] target/s390x: Use cpu_*_mmu instead of helper_*_mmu Richard Henderson
2021-08-18 19:18 ` [PATCH v3 40/66] target/sparc: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 41/66] target/arm: " Richard Henderson
2021-08-18 19:18 ` [PATCH v3 42/66] tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h Richard Henderson
2021-08-18 19:18 ` [PATCH v3 43/66] tcg: Add helper_unaligned_{ld, st} for user-only sigbus Richard Henderson
2021-08-19 15:58   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 44/66] tcg/i386: Support raising sigbus for user-only Richard Henderson
2021-08-19 16:02   ` Peter Maydell
2021-08-18 19:18 ` [PATCH v3 45/66] tests/tcg/multiarch: Add sigbus.c Richard Henderson
2021-08-19 16:04   ` Peter Maydell
2021-08-18 19:19 ` [PATCH v3 46/66] linux-user: Split out do_prctl and subroutines Richard Henderson
2021-08-19 16:06   ` Peter Maydell
2021-08-19 19:30     ` Richard Henderson
2021-08-18 19:19 ` [PATCH v3 47/66] linux-user: Disable more prctl subcodes Richard Henderson
2021-08-18 19:19 ` [PATCH v3 48/66] hw/core/cpu: Re-sort the non-pointers to the end of CPUClass Richard Henderson
2021-08-18 21:17   ` Philippe Mathieu-Daudé
2021-08-18 19:19 ` [PATCH v3 49/66] linux-user: Add code for PR_GET/SET_UNALIGN Richard Henderson
2021-08-18 19:19 ` [PATCH v3 50/66] hw/core/cpu: Move cpu properties to cpu-sysemu.c Richard Henderson
2021-08-19 15:26   ` Peter Maydell
2021-08-19 16:52     ` Eduardo Habkost
2021-08-18 19:19 ` [PATCH v3 51/66] hw/core/cpu: Add prctl-unalign-sigbus property for user-only Richard Henderson
2021-08-18 19:19 ` [PATCH v3 52/66] target/alpha: Reorg fp memory operations Richard Henderson
2021-08-18 21:21   ` Philippe Mathieu-Daudé
2021-08-18 19:19 ` [PATCH v3 53/66] target/alpha: Reorg integer " Richard Henderson
2021-08-20  9:29   ` Peter Maydell
2021-08-18 19:19 ` [PATCH v3 54/66] target/alpha: Implement prctl_unalign_sigbus Richard Henderson
2021-08-18 19:19 ` [PATCH v3 55/66] target/hppa: " Richard Henderson
2021-08-18 19:19 ` [PATCH v3 56/66] target/sh4: " Richard Henderson
2021-08-18 19:19 ` [PATCH v3 57/66] accel/tcg/user-exec: Convert DEBUG_SIGNAL to tracepoint Richard Henderson
2021-08-18 21:22   ` Philippe Mathieu-Daudé
2021-08-18 19:19 ` [PATCH v3 58/66] include/exec: Move cpu_signal_handler declaration Richard Henderson
2021-08-18 21:23   ` Philippe Mathieu-Daudé
2021-08-19  6:18   ` Alistair Francis
2021-08-18 19:19 ` [PATCH v3 59/66] accel/tcg: Handle SIGBUS in handle_cpu_signal Richard Henderson
2021-08-20  9:34   ` Peter Maydell
2021-08-22  7:48     ` Richard Henderson
2021-08-18 19:19 ` [PATCH v3 60/66] tcg/aarch64: Support raising sigbus for user-only Richard Henderson
2021-08-20  9:46   ` Peter Maydell
2021-08-18 19:19 ` [PATCH v3 61/66] tcg/ppc: " Richard Henderson
2021-08-20 10:11   ` Peter Maydell
2021-08-18 19:19 ` [PATCH v3 62/66] tcg/s390: " Richard Henderson
2021-08-20 10:12   ` Peter Maydell
2021-08-18 19:19 ` [PATCH v3 63/66] tcg/tci: " Richard Henderson
2021-08-20 10:14   ` Peter Maydell
2021-08-22  7:59     ` Richard Henderson
2021-08-22 12:32       ` Peter Maydell
2021-08-22 17:09         ` Richard Henderson
2021-08-18 19:19 ` [PATCH v3 64/66] tcg: Canonicalize alignment flags in MemOp Richard Henderson
2021-08-18 21:24   ` Philippe Mathieu-Daudé
2021-08-18 19:19 ` [PATCH v3 65/66] tcg/riscv: Support raising sigbus for user-only Richard Henderson
2021-08-18 19:19 ` [PATCH v3 66/66] tcg/riscv: Remove add with zero on user-only memory access Richard Henderson
2021-08-30 21:29   ` Philippe Mathieu-Daudé
2021-08-30 22:38   ` Alistair Francis

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