From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B679C48BDF for ; Tue, 15 Jun 2021 21:26:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8DA460FEB for ; Tue, 15 Jun 2021 21:26:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A8DA460FEB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:51632 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltGZM-0002F5-Qx for qemu-devel@archiver.kernel.org; Tue, 15 Jun 2021 17:26:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36182) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltGYH-0000gY-UJ; Tue, 15 Jun 2021 17:24:53 -0400 Received: from mail-il1-x12f.google.com ([2607:f8b0:4864:20::12f]:45583) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ltGYE-0004qq-TR; Tue, 15 Jun 2021 17:24:53 -0400 Received: by mail-il1-x12f.google.com with SMTP id b5so390397ilc.12; Tue, 15 Jun 2021 14:24:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=+FCcwW3K2vfQjUUn3Zh+/VrgTDEPwB8VCvO8eYvxtqI=; b=Q4qzlntoBRTl4ZC5RVEeHm/o7nupOb51v+3xqD6c7v0vWrRtC1KkhUIhIXkkF1KwhX HY3UHD6EAfWJKrz3dun7GC2y8lKgJCz10/Hkzg50bLUhXZ8uFEzfC9xyX3NNt5g1IQHe KNK+uqbwcIMC9EFlQVHb/Qogqu//nkMImsvm7taOUIPiVuS4qEOP4LP7ls1x3HSN48tz +JYOcg2tqzh9Ws6xhIL31DTWflmh16AH9dPhuYFpP89oJozcov2fzT45Yh/osOuVFUVl 32CZqQWHmyM6GqWgWE8HtjoNju6RQ2lQupzKvY93prwjACIb4KgHU0bNY3rlKzRJaphr woog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+FCcwW3K2vfQjUUn3Zh+/VrgTDEPwB8VCvO8eYvxtqI=; b=j4sMKhie23hVgH3ey79y6n3KSSW+hbMsBn1L5BsUSArc6n0PjEQ9pSHnsu+o61mVRQ AUGKxa9U8ofOeyTeM2MUCUMw3V+EI7dI14szxAPSpaEHM53X3HIogpyFZS1DZyVr6E/r akBTzUlA/ZtSiuq68JYSgjcHhhYn91mBtddh5Kk5tMqwWsUW8NhpukN3RkEvmNPnZtRO 3+uVMDUR0itgNSpiUEEUNMnh0sKlGDYPA5YgHINL9ZrXXBbbcAsqBYsT1tov9syuyPv8 vZTP86uUjE2Z0ntBhFg00QV/ku5qO/Qo3dP8Hl7ILxpAz820X6MYyAAVLHsIHdgZqJ/e CR3A== X-Gm-Message-State: AOAM530cKcWiBz3hkzTKRBnlvjCHdQF6NcRZ3UGSSq9XKUGTXoLzIywX 64clu5TRJLENPtxQKQ67b8pXCospHCDVXKMeIV0= X-Google-Smtp-Source: ABdhPJyjHYEyMzux7CrK7C9oBXJyQnW1LDWltfqXq6oFEhczcDsLLAnc7LiqqnSX2f/N0S3/65pPBx4vKWJieHGk2S4= X-Received: by 2002:a05:6e02:b25:: with SMTP id e5mr1009692ilu.131.1623792289150; Tue, 15 Jun 2021 14:24:49 -0700 (PDT) MIME-Version: 1.0 References: <20210615153440.1307729-1-erdnaxe@crans.org> <20210615153440.1307729-3-erdnaxe@crans.org> In-Reply-To: <20210615153440.1307729-3-erdnaxe@crans.org> From: Alistair Francis Date: Wed, 16 Jun 2021 07:24:23 +1000 Message-ID: Subject: Re: [PATCH v2 2/3] stm32vldiscovery: Add the STM32VLDISCOVERY Machine To: Alexandre Iooss Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::12f; envelope-from=alistair23@gmail.com; helo=mail-il1-x12f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "open list:STM32VLDISCOVERY" , "open list:All patches CC here" , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, Jun 16, 2021 at 1:35 AM Alexandre Iooss wrote: > > This is a Cortex-M3 based machine. Information can be found at: > https://www.st.com/en/evaluation-tools/stm32vldiscovery.html > > Signed-off-by: Alexandre Iooss Reviewed-by: Alistair Francis Alistair > --- > MAINTAINERS | 6 +++ > default-configs/devices/arm-softmmu.mak | 1 + > hw/arm/Kconfig | 4 ++ > hw/arm/meson.build | 1 + > hw/arm/stm32vldiscovery.c | 66 +++++++++++++++++++++++++ > 5 files changed, 78 insertions(+) > create mode 100644 hw/arm/stm32vldiscovery.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index 62dfa31800..0aa8016936 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -891,6 +891,12 @@ F: hw/*/stellaris* > F: include/hw/input/gamepad.h > F: docs/system/arm/stellaris.rst > > +STM32VLDISCOVERY > +M: Alexandre Iooss > +L: qemu-arm@nongnu.org > +S: Maintained > +F: hw/arm/stm32vldiscovery.c > + > Versatile Express > M: Peter Maydell > L: qemu-arm@nongnu.org > diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak > index 0500156a0c..cdc0e97f9d 100644 > --- a/default-configs/devices/arm-softmmu.mak > +++ b/default-configs/devices/arm-softmmu.mak > @@ -18,6 +18,7 @@ CONFIG_CHEETAH=y > CONFIG_SX1=y > CONFIG_NSERIES=y > CONFIG_STELLARIS=y > +CONFIG_STM32VLDISCOVERY=y > CONFIG_REALVIEW=y > CONFIG_VERSATILE=y > CONFIG_VEXPRESS=y > diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig > index 0bc3ee3e91..dc4e47b721 100644 > --- a/hw/arm/Kconfig > +++ b/hw/arm/Kconfig > @@ -239,6 +239,10 @@ config STELLARIS > select STELLARIS_ENET # ethernet > select UNIMP > > +config STM32VLDISCOVERY > + bool > + select STM32F100_SOC > + > config STRONGARM > bool > select PXA2XX > diff --git a/hw/arm/meson.build b/hw/arm/meson.build > index 0e637e6a9e..721a8eb8be 100644 > --- a/hw/arm/meson.build > +++ b/hw/arm/meson.build > @@ -24,6 +24,7 @@ arm_ss.add(when: 'CONFIG_Z2', if_true: files('z2.c')) > arm_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c')) > arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c')) > arm_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c')) > +arm_ss.add(when: 'CONFIG_STM32VLDISCOVERY', if_true: files('stm32vldiscovery.c')) > arm_ss.add(when: 'CONFIG_COLLIE', if_true: files('collie.c')) > arm_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c')) > arm_ss.add(when: 'CONFIG_VEXPRESS', if_true: files('vexpress.c')) > diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c > new file mode 100644 > index 0000000000..7e8191ebf5 > --- /dev/null > +++ b/hw/arm/stm32vldiscovery.c > @@ -0,0 +1,66 @@ > +/* > + * ST STM32VLDISCOVERY machine > + * > + * Copyright (c) 2021 Alexandre Iooss > + * Copyright (c) 2014 Alistair Francis > + * > + * Permission is hereby granted, free of charge, to any person obtaining a copy > + * of this software and associated documentation files (the "Software"), to deal > + * in the Software without restriction, including without limitation the rights > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell > + * copies of the Software, and to permit persons to whom the Software is > + * furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN > + * THE SOFTWARE. > + */ > + > +#include "qemu/osdep.h" > +#include "qapi/error.h" > +#include "hw/boards.h" > +#include "hw/qdev-properties.h" > +#include "qemu/error-report.h" > +#include "hw/arm/stm32f100_soc.h" > +#include "hw/arm/boot.h" > + > +/* stm32vldiscovery implementation is derived from netduinoplus2 */ > + > +/* Main SYSCLK frequency in Hz (24MHz) */ > +#define SYSCLK_FRQ 24000000ULL > + > +static void stm32vldiscovery_init(MachineState *machine) > +{ > + DeviceState *dev; > + > + /* > + * TODO: ideally we would model the SoC RCC and let it handle > + * system_clock_scale, including its ability to define different > + * possible SYSCLK sources. > + */ > + system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ; > + > + dev = qdev_new(TYPE_STM32F100_SOC); > + qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); > + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > + > + armv7m_load_kernel(ARM_CPU(first_cpu), > + machine->kernel_filename, > + FLASH_SIZE); > +} > + > +static void stm32vldiscovery_machine_init(MachineClass *mc) > +{ > + mc->desc = "ST STM32VLDISCOVERY (Cortex-M3)"; > + mc->init = stm32vldiscovery_init; > +} > + > +DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init) > + > -- > 2.25.1 >