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That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Daniel P. Berrange" , "qemu-devel@nongnu.org Developers" , Eduardo Habkost Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, May 19, 2020 at 8:04 AM Markus Armbruster wrote: > > The callers of object_initialize_child() commonly pass either > &child, sizeof(child), or pchild, sizeof(*pchild). Tidy up the few > that don't, mostly to keep the next commit simpler. > > Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis Alistair > --- > hw/arm/aspeed.c | 2 +- > hw/microblaze/xlnx-zynqmp-pmu.c | 3 +-- > hw/pci-host/pnv_phb4.c | 2 +- > hw/riscv/riscv_hart.c | 2 +- > 4 files changed, 4 insertions(+), 5 deletions(-) > > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > index adbfbbd6b4..eaf50da8df 100644 > --- a/hw/arm/aspeed.c > +++ b/hw/arm/aspeed.c > @@ -267,7 +267,7 @@ static void aspeed_machine_init(MachineState *machine) > memory_region_add_subregion(&bmc->ram_container, 0, machine->ram); > > object_initialize_child(OBJECT(machine), "soc", &bmc->soc, > - (sizeof(bmc->soc)), amc->soc_name, &error_abort, > + sizeof(bmc->soc), amc->soc_name, &error_abort, > NULL); > > sc = ASPEED_SOC_GET_CLASS(&bmc->soc); > diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c > index 028f31894d..aa90b9d1be 100644 > --- a/hw/microblaze/xlnx-zynqmp-pmu.c > +++ b/hw/microblaze/xlnx-zynqmp-pmu.c > @@ -174,8 +174,7 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) > pmu_ram); > > /* Create the PMU device */ > - object_initialize_child(OBJECT(machine), "pmu", pmu, > - sizeof(XlnxZynqMPPMUSoCState), > + object_initialize_child(OBJECT(machine), "pmu", pmu, sizeof(*pmu), > TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL); > object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); > > diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c > index e30ae9ad5b..aba710fd1f 100644 > --- a/hw/pci-host/pnv_phb4.c > +++ b/hw/pci-host/pnv_phb4.c > @@ -1155,7 +1155,7 @@ static void pnv_phb4_instance_init(Object *obj) > QLIST_INIT(&phb->dma_spaces); > > /* XIVE interrupt source object */ > - object_initialize_child(obj, "source", &phb->xsrc, sizeof(XiveSource), > + object_initialize_child(obj, "source", &phb->xsrc, sizeof(phb->xsrc), > TYPE_XIVE_SOURCE, &error_abort, NULL); > > /* Root Port */ > diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c > index 276a9baca0..61e88e2e37 100644 > --- a/hw/riscv/riscv_hart.c > +++ b/hw/riscv/riscv_hart.c > @@ -46,7 +46,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, int idx, > Error *err = NULL; > > object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], > - sizeof(RISCVCPU), cpu_type, > + sizeof(s->harts[idx]), cpu_type, > &error_abort, NULL); > s->harts[idx].env.mhartid = s->hartid_base + idx; > qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); > -- > 2.21.1 > >