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That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Palmer Dabbelt , Alistair Francis , "qemu-devel@nongnu.org Developers" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Oct 26, 2020 at 1:56 AM Bin Meng wrote: > > On Fri, Oct 23, 2020 at 11:44 PM Alistair Francis > wrote: > > > > Could you please put some details as to why changing uint64_t to > target_ulong (and vice versa) is needed? Done! Alistair > > > Signed-off-by: Alistair Francis > > --- > > target/riscv/fpu_helper.c | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > > > diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c > > index bb346a8249..507d7fe7fa 100644 > > --- a/target/riscv/fpu_helper.c > > +++ b/target/riscv/fpu_helper.c > > @@ -224,13 +224,13 @@ target_ulong helper_fcvt_wu_s(CPURISCVState *env, uint64_t rs1) > > } > > > > #if defined(TARGET_RISCV64) > > -uint64_t helper_fcvt_l_s(CPURISCVState *env, uint64_t rs1) > > +target_ulong helper_fcvt_l_s(CPURISCVState *env, uint64_t rs1) > > { > > float32 frs1 = check_nanbox_s(rs1); > > return float32_to_int64(frs1, &env->fp_status); > > } > > > > -uint64_t helper_fcvt_lu_s(CPURISCVState *env, uint64_t rs1) > > +target_ulong helper_fcvt_lu_s(CPURISCVState *env, uint64_t rs1) > > { > > float32 frs1 = check_nanbox_s(rs1); > > return float32_to_uint64(frs1, &env->fp_status); > > @@ -248,12 +248,12 @@ uint64_t helper_fcvt_s_wu(CPURISCVState *env, target_ulong rs1) > > } > > > > #if defined(TARGET_RISCV64) > > -uint64_t helper_fcvt_s_l(CPURISCVState *env, uint64_t rs1) > > +uint64_t helper_fcvt_s_l(CPURISCVState *env, target_ulong rs1) > > { > > return nanbox_s(int64_to_float32(rs1, &env->fp_status)); > > } > > > > -uint64_t helper_fcvt_s_lu(CPURISCVState *env, uint64_t rs1) > > +uint64_t helper_fcvt_s_lu(CPURISCVState *env, target_ulong rs1) > > { > > return nanbox_s(uint64_to_float32(rs1, &env->fp_status)); > > } > > @@ -337,12 +337,12 @@ target_ulong helper_fcvt_wu_d(CPURISCVState *env, uint64_t frs1) > > } > > > > #if defined(TARGET_RISCV64) > > -uint64_t helper_fcvt_l_d(CPURISCVState *env, uint64_t frs1) > > +target_ulong helper_fcvt_l_d(CPURISCVState *env, uint64_t frs1) > > { > > return float64_to_int64(frs1, &env->fp_status); > > } > > > > -uint64_t helper_fcvt_lu_d(CPURISCVState *env, uint64_t frs1) > > +target_ulong helper_fcvt_lu_d(CPURISCVState *env, uint64_t frs1) > > { > > return float64_to_uint64(frs1, &env->fp_status); > > } > > @@ -359,12 +359,12 @@ uint64_t helper_fcvt_d_wu(CPURISCVState *env, target_ulong rs1) > > } > > > > #if defined(TARGET_RISCV64) > > -uint64_t helper_fcvt_d_l(CPURISCVState *env, uint64_t rs1) > > +uint64_t helper_fcvt_d_l(CPURISCVState *env, target_ulong rs1) > > { > > return int64_to_float64(rs1, &env->fp_status); > > } > > > > -uint64_t helper_fcvt_d_lu(CPURISCVState *env, uint64_t rs1) > > +uint64_t helper_fcvt_d_lu(CPURISCVState *env, target_ulong rs1) > > { > > return uint64_to_float64(rs1, &env->fp_status); > > } > > -- > > Regards, > Bin