From: Alistair Francis <alistair23@gmail.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH 2/2] target/riscv: csr: Remove redundant check in fp csr read/write routines
Date: Tue, 15 Jun 2021 20:42:40 +1000 [thread overview]
Message-ID: <CAKmqyKOzuk+0P+bBtrbenVa3mdKcPuc0jqAN9gniRTVh3dP3dw@mail.gmail.com> (raw)
In-Reply-To: <CAEUhbmWmAU=eEKDSGR4fSp0-9b3GbVkfisgbOgT-A9wV9f=3cQ@mail.gmail.com>
On Tue, Jun 15, 2021 at 7:07 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Hi Alistair,
>
> On Wed, Mar 31, 2021 at 11:53 PM Alistair Francis <alistair23@gmail.com> wrote:
> >
> > On Tue, Mar 30, 2021 at 10:18 PM Bin Meng <bmeng.cn@gmail.com> wrote:
> > >
> > > The following check:
> > >
> > > if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
> > > return -RISCV_EXCP_ILLEGAL_INST;
> > > }
> > >
> > > is redundant in fflags/frm/fcsr read/write routines, as the check was
> > > already done in fs().
> > >
> > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> >
> > Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> >
>
> It looks like this patch was not applied anywhere?
Nope, it doesn't appear to have been. Do you mind re-sending it?
Alistair
>
> Regards,
> Bin
next prev parent reply other threads:[~2021-06-15 10:44 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-31 2:18 [PATCH 1/2] target/riscv: csr: Fix hmode32() for RV64 Bin Meng
2021-03-31 2:18 ` [PATCH 2/2] target/riscv: csr: Remove redundant check in fp csr read/write routines Bin Meng
2021-03-31 15:51 ` Alistair Francis
2021-06-15 9:07 ` Bin Meng
2021-06-15 10:42 ` Alistair Francis [this message]
2021-03-31 15:03 ` [PATCH 1/2] target/riscv: csr: Fix hmode32() for RV64 Alistair Francis
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