From: Alistair Francis <alistair23@gmail.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
Alistair Francis <alistair.francis@wdc.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH] target/riscv: pmp: Fix some typos
Date: Thu, 1 Jul 2021 11:27:21 +1000 [thread overview]
Message-ID: <CAKmqyKP6ZW=LYY7wHxk2Gxa_0s8z5xFhG=JdoX2SqJGLW6pAKA@mail.gmail.com> (raw)
In-Reply-To: <20210627115716.3552-1-bmeng.cn@gmail.com>
On Sun, Jun 27, 2021 at 9:57 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> %s/CSP/CSR
> %s/thie/the
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
>
> target/riscv/pmp.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
> index 82ed020b10..54abf42583 100644
> --- a/target/riscv/pmp.c
> +++ b/target/riscv/pmp.c
> @@ -456,7 +456,7 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong addr,
> }
>
> /*
> - * Handle a write to a pmpcfg CSP
> + * Handle a write to a pmpcfg CSR
> */
> void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
> target_ulong val)
> @@ -483,7 +483,7 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
>
>
> /*
> - * Handle a read from a pmpcfg CSP
> + * Handle a read from a pmpcfg CSR
> */
> target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index)
> {
> @@ -502,7 +502,7 @@ target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index)
>
>
> /*
> - * Handle a write to a pmpaddr CSP
> + * Handle a write to a pmpaddr CSR
> */
> void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index,
> target_ulong val)
> @@ -540,7 +540,7 @@ void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index,
>
>
> /*
> - * Handle a read from a pmpaddr CSP
> + * Handle a read from a pmpaddr CSR
> */
> target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index)
> {
> @@ -593,7 +593,7 @@ target_ulong mseccfg_csr_read(CPURISCVState *env)
>
> /*
> * Calculate the TLB size if the start address or the end address of
> - * PMP entry is presented in thie TLB page.
> + * PMP entry is presented in the TLB page.
> */
> static target_ulong pmp_get_tlb_size(CPURISCVState *env, int pmp_index,
> target_ulong tlb_sa, target_ulong tlb_ea)
> --
> 2.25.1
>
>
prev parent reply other threads:[~2021-07-01 1:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-27 11:57 [PATCH] target/riscv: pmp: Fix some typos Bin Meng
2021-06-27 15:34 ` Philippe Mathieu-Daudé
2021-06-28 0:21 ` Alistair Francis
2021-07-01 1:27 ` Alistair Francis [this message]
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