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From: Alistair Francis <alistair23@gmail.com>
To: Anup Patel <anup.patel@wdc.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	"open list:RISC-V" <qemu-riscv@nongnu.org>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH 2/3] hw/riscv/spike: Allow loading firmware separately using -bios option
Date: Fri, 21 Feb 2020 11:49:54 -0800	[thread overview]
Message-ID: <CAKmqyKPAg67F8G7=QmBD6VzZMv-KQFh3HbFT0tjTPufixwfG7Q@mail.gmail.com> (raw)
In-Reply-To: <20200214072127.64330-3-anup.patel@wdc.com>

On Thu, Feb 13, 2020 at 11:22 PM Anup Patel <anup.patel@wdc.com> wrote:
>
> This patch extends Spike machine support to allow loading OpenSBI
> firmware (fw_jump.elf) separately using -bios option.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>

Can you add something in the commit message adding that you also
support adding an initrd with this patch?

Otherwise:

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/spike.c | 24 +++++++++++++++++++++++-
>  1 file changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index 8823681783..060a86f922 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -45,6 +45,12 @@
>
>  #include <libfdt.h>
>
> +#if defined(TARGET_RISCV32)
> +# define BIOS_FILENAME "opensbi-riscv32-spike-fw_jump.elf"
> +#else
> +# define BIOS_FILENAME "opensbi-riscv64-spike-fw_jump.elf"
> +#endif
> +
>  static const struct MemmapEntry {
>      hwaddr base;
>      hwaddr size;
> @@ -183,8 +189,24 @@ static void spike_board_init(MachineState *machine)
>      memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
>                                  mask_rom);
>
> +    riscv_find_and_load_firmware(machine, BIOS_FILENAME,
> +                                 memmap[SPIKE_DRAM].base,
> +                                 htif_symbol_callback);
> +
>      if (machine->kernel_filename) {
> -        riscv_load_kernel(machine->kernel_filename, htif_symbol_callback);
> +        uint64_t kernel_entry = riscv_load_kernel(machine->kernel_filename,
> +                                                  htif_symbol_callback);
> +
> +        if (machine->initrd_filename) {
> +            hwaddr start;
> +            hwaddr end = riscv_load_initrd(machine->initrd_filename,
> +                                           machine->ram_size, kernel_entry,
> +                                           &start);
> +            qemu_fdt_setprop_cell(s->fdt, "/chosen",
> +                                  "linux,initrd-start", start);
> +            qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end",
> +                                  end);
> +        }
>      }
>
>      /* reset vector */
> --
> 2.17.1
>
>


  reply	other threads:[~2020-02-21 19:51 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-14  7:21 [PATCH 0/3] RISC-V Spike machine improvements Anup Patel
2020-02-14  7:21 ` [PATCH 1/3] hw/riscv: Add optional symbol callback ptr to riscv_load_firmware() Anup Patel
2020-02-21 19:48   ` Alistair Francis
2020-02-14  7:21 ` [PATCH 2/3] hw/riscv/spike: Allow loading firmware separately using -bios option Anup Patel
2020-02-21 19:49   ` Alistair Francis [this message]
2020-02-14  7:21 ` [PATCH 3/3] hw/riscv/spike: Allow more than one CPUs Anup Patel
2020-02-14 20:42   ` Alistair Francis

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