From: Alistair Francis <alistair23@gmail.com>
To: Khem Raj <raj.khem@gmail.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Bin Meng <bin.meng@windriver.com>,
Alistair Francis <alistair.francis@wdc.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH] riscv: Set 5.4 as minimum kernel version for riscv32
Date: Fri, 17 Dec 2021 11:32:35 +1000 [thread overview]
Message-ID: <CAKmqyKPCDF4TjK7m2=HEjrNhnUw-YoyBvBUJv60BzvFoP=2F6g@mail.gmail.com> (raw)
In-Reply-To: <20211216073111.2890607-1-raj.khem@gmail.com>
On Thu, Dec 16, 2021 at 5:33 PM Khem Raj <raj.khem@gmail.com> wrote:
>
> 5.4 is first stable API as far as rv32 is concerned see [1]
>
> [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=7a55dd3fb6d2c307a002a16776be84310b9c8989
>
> Signed-off-by: Khem Raj <raj.khem@gmail.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Alistair Francis <alistair.francis@wdc.com>
> Cc: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> linux-user/riscv/target_syscall.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/linux-user/riscv/target_syscall.h b/linux-user/riscv/target_syscall.h
> index dc597c8972..9b13161324 100644
> --- a/linux-user/riscv/target_syscall.h
> +++ b/linux-user/riscv/target_syscall.h
> @@ -45,10 +45,11 @@ struct target_pt_regs {
>
> #ifdef TARGET_RISCV32
> #define UNAME_MACHINE "riscv32"
> +#define UNAME_MINIMUM_RELEASE "5.4.0"
> #else
> #define UNAME_MACHINE "riscv64"
> -#endif
> #define UNAME_MINIMUM_RELEASE "4.15.0"
> +#endif
>
> #define TARGET_MINSIGSTKSZ 2048
> #define TARGET_MCL_CURRENT 1
> --
> 2.34.1
>
>
next prev parent reply other threads:[~2021-12-17 1:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 7:31 [PATCH] riscv: Set 5.4 as minimum kernel version for riscv32 Khem Raj
2021-12-17 1:32 ` Alistair Francis [this message]
2021-12-17 5:11 ` Alistair Francis
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