From: Alistair Francis <alistair23@gmail.com>
To: Weiwei Li <liweiwei@iscas.ac.cn>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, palmer@dabbelt.com,
alistair.francis@wdc.com, bin.meng@windriver.com,
dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
wangjunqiang@iscas.ac.cn, lazyparser@gmail.com,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH v2 04/10] target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled
Date: Wed, 5 Apr 2023 15:20:05 +1000 [thread overview]
Message-ID: <CAKmqyKPU_0+qfX9ybob4K9WjBiE9Ag2hU68W=YG+BvZ3-Robow@mail.gmail.com> (raw)
In-Reply-To: <20230327080858.39703-5-liweiwei@iscas.ac.cn>
On Mon, Mar 27, 2023 at 6:12 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> In current implementation, riscv_cpu_set_virt_enabled is only called when
> RVH is enabled.
>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu_helper.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 62fd2c90f1..b286118a6b 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -563,12 +563,9 @@ bool riscv_cpu_virt_enabled(CPURISCVState *env)
> return get_field(env->virt, VIRT_ONOFF);
> }
>
> +/* This function can only be called to set virt when RVH is enabled */
> void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable)
> {
> - if (!riscv_has_ext(env, RVH)) {
> - return;
> - }
> -
> /* Flush the TLB on all virt mode changes. */
> if (get_field(env->virt, VIRT_ONOFF) != enable) {
> tlb_flush(env_cpu(env));
> --
> 2.25.1
>
>
next prev parent reply other threads:[~2023-04-05 5:21 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 8:08 [PATCH v2 00/10] target/riscv: Simplification for RVH related check and code style fix Weiwei Li
2023-03-27 8:08 ` [PATCH v2 01/10] target/riscv: Remove redundant call to riscv_cpu_virt_enabled Weiwei Li
2023-04-05 5:17 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 02/10] target/riscv: Remove redundant check on RVH Weiwei Li
2023-04-05 5:17 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 03/10] target/riscv: Remove check on RVH for riscv_cpu_virt_enabled Weiwei Li
2023-04-05 5:18 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 04/10] target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled Weiwei Li
2023-04-05 5:20 ` Alistair Francis [this message]
2023-03-27 8:08 ` [PATCH v2 05/10] target/riscv: Convert env->virt to a bool env->virt_enabled Weiwei Li
2023-03-27 18:09 ` Richard Henderson
2023-04-05 5:26 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 06/10] target/riscv: Remove riscv_cpu_virt_enabled() Weiwei Li
2023-03-27 18:10 ` Richard Henderson
2023-03-28 1:14 ` LIU Zhiwei
2023-04-05 5:26 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 07/10] target/riscv: Remove redundant parentheses Weiwei Li
2023-04-05 5:27 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 08/10] target/riscv: Fix format for indentation Weiwei Li
2023-04-05 5:29 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 09/10] target/riscv: Fix format for comments Weiwei Li
2023-04-05 5:28 ` Alistair Francis
2023-03-27 8:08 ` [PATCH v2 10/10] target/riscv: Fix lines with over 80 characters Weiwei Li
2023-04-05 5:30 ` Alistair Francis
2023-04-05 5:30 ` [PATCH v2 00/10] target/riscv: Simplification for RVH related check and code style fix Alistair Francis
2023-04-05 5:39 ` Alistair Francis
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