From: Alistair Francis <alistair23@gmail.com>
To: Frank Chang <frank.chang@sifive.com>
Cc: Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v4 8/8] target/riscv: zfh: add Zfhmin cpu property
Date: Thu, 21 Oct 2021 09:25:55 +1000 [thread overview]
Message-ID: <CAKmqyKPrKaRt=m9BBjYJyF4844kkuTKXod8FWjNkHMDCe7ukXQ@mail.gmail.com> (raw)
In-Reply-To: <20211020030653.213565-9-frank.chang@sifive.com>
On Wed, Oct 20, 2021 at 1:13 PM <frank.chang@sifive.com> wrote:
>
> From: Frank Chang <frank.chang@sifive.com>
>
> Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 8c579dc297b..4c0e6532164 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -602,6 +602,7 @@ static Property riscv_cpu_properties[] = {
> DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true),
> DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true),
> DEFINE_PROP_BOOL("Zfh", RISCVCPU, cfg.ext_zfh, false),
> + DEFINE_PROP_BOOL("Zfhmin", RISCVCPU, cfg.ext_zfhmin, false),
> DEFINE_PROP_STRING("priv_spec", RISCVCPU, cfg.priv_spec),
> DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec),
> DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128),
> --
> 2.25.1
>
>
next prev parent reply other threads:[~2021-10-20 23:31 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20211020030653.213565-1-frank.chang@sifive.com>
2021-10-20 3:06 ` [PATCH v4 1/8] target/riscv: zfh: half-precision load and store frank.chang
2021-10-20 3:06 ` [PATCH v4 2/8] target/riscv: zfh: half-precision computational frank.chang
2021-10-20 3:06 ` [PATCH v4 3/8] target/riscv: zfh: half-precision convert and move frank.chang
2021-10-20 3:06 ` [PATCH v4 4/8] target/riscv: zfh: half-precision floating-point compare frank.chang
2021-10-20 3:06 ` [PATCH v4 5/8] target/riscv: zfh: half-precision floating-point classify frank.chang
2021-10-20 3:06 ` [PATCH v4 6/8] target/riscv: zfh: add Zfh cpu property frank.chang
2021-10-20 23:25 ` Alistair Francis
2021-10-20 3:06 ` [PATCH v4 7/8] target/riscv: zfh: implement zfhmin extension frank.chang
2021-10-20 3:06 ` [PATCH v4 8/8] target/riscv: zfh: add Zfhmin cpu property frank.chang
2021-10-20 23:25 ` Alistair Francis [this message]
2021-10-20 23:26 ` Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAKmqyKPrKaRt=m9BBjYJyF4844kkuTKXod8FWjNkHMDCe7ukXQ@mail.gmail.com' \
--to=alistair23@gmail.com \
--cc=alistair.francis@wdc.com \
--cc=bin.meng@windriver.com \
--cc=frank.chang@sifive.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).