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X-Received-From: 2607:f8b0:4864:20::244 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , "xen-devel@lists.xenproject.org" , Paul Durrant , "Michael S. Tsirkin" , "qemu-devel@nongnu.org" , Eduardo Habkost , =?UTF-8?Q?Herv=C3=A9_Poussineau?= , Aleksandar Markovic , Igor Mammedov , Anthony Perard , Paolo Bonzini , Aleksandar Rikalo , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --0000000000008a47d105957cc71c Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Friday, October 18, 2019, Philippe Mathieu-Daud=C3=A9 wrote: > From: Herv=C3=A9 Poussineau > > Add ISA irqs as piix4 gpio in, and CPU interrupt request as piix4 gpio ou= t. > Remove i8259 instanciated in malta board, to not have it twice. > > We can also remove the now unused piix4_init() function. > > Acked-by: Michael S. Tsirkin > Acked-by: Paolo Bonzini > Signed-off-by: Herv=C3=A9 Poussineau > Message-Id: <20171216090228.28505-8-hpoussin@reactos.org> > Reviewed-by: Aleksandar Markovic > [PMD: rebased, updated includes, use ISA_NUM_IRQS in for loop] > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > hw/isa/piix4.c | 43 ++++++++++++++++++++++++++++++++----------- > hw/mips/mips_malta.c | 32 +++++++++++++------------------- > include/hw/i386/pc.h | 1 - > 3 files changed, 45 insertions(+), 31 deletions(-) > > A detail: In the title: Add a i8259 -> Add an i8259 A. > diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c > index d0b18e0586..9c37c85ae2 100644 > --- a/hw/isa/piix4.c > +++ b/hw/isa/piix4.c > @@ -24,6 +24,7 @@ > */ > > #include "qemu/osdep.h" > +#include "hw/irq.h" > #include "hw/i386/pc.h" > #include "hw/pci/pci.h" > #include "hw/isa/isa.h" > @@ -36,6 +37,8 @@ PCIDevice *piix4_dev; > > typedef struct PIIX4State { > PCIDevice dev; > + qemu_irq cpu_intr; > + qemu_irq *isa; > > /* Reset Control Register */ > MemoryRegion rcr_mem; > @@ -94,6 +97,18 @@ static const VMStateDescription vmstate_piix4 =3D { > } > }; > > +static void piix4_request_i8259_irq(void *opaque, int irq, int level) > +{ > + PIIX4State *s =3D opaque; > + qemu_set_irq(s->cpu_intr, level); > +} > + > +static void piix4_set_i8259_irq(void *opaque, int irq, int level) > +{ > + PIIX4State *s =3D opaque; > + qemu_set_irq(s->isa[irq], level); > +} > + > static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, > unsigned int len) > { > @@ -127,29 +142,35 @@ static const MemoryRegionOps piix4_rcr_ops =3D { > static void piix4_realize(PCIDevice *dev, Error **errp) > { > PIIX4State *s =3D PIIX4_PCI_DEVICE(dev); > + ISABus *isa_bus; > + qemu_irq *i8259_out_irq; > > - if (!isa_bus_new(DEVICE(dev), pci_address_space(dev), > - pci_address_space_io(dev), errp)) { > + isa_bus =3D isa_bus_new(DEVICE(dev), pci_address_space(dev), > + pci_address_space_io(dev), errp); > + if (!isa_bus) { > return; > } > > + qdev_init_gpio_in_named(DEVICE(dev), piix4_set_i8259_irq, > + "isa", ISA_NUM_IRQS); > + qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr, > + "intr", 1); > + > memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s, > "reset-control", 1); > memory_region_add_subregion_overlap(pci_address_space_io(dev), 0xcf9= , > &s->rcr_mem, 1); > > + /* initialize i8259 pic */ > + i8259_out_irq =3D qemu_allocate_irqs(piix4_request_i8259_irq, s, 1); > + s->isa =3D i8259_init(isa_bus, *i8259_out_irq); > + > + /* initialize ISA irqs */ > + isa_bus_irqs(isa_bus, s->isa); > + > piix4_dev =3D dev; > } > > -int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn) > -{ > - PCIDevice *d; > - > - d =3D pci_create_simple_multifunction(bus, devfn, true, "PIIX4"); > - *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(d), "isa.0")); > - return d->devfn; > -} > - > static void piix4_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc =3D DEVICE_CLASS(klass); > diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c > index 4d9c64b36a..7d25ab6c23 100644 > --- a/hw/mips/mips_malta.c > +++ b/hw/mips/mips_malta.c > @@ -97,7 +97,7 @@ typedef struct { > SysBusDevice parent_obj; > > MIPSCPSState cps; > - qemu_irq *i8259; > + qemu_irq i8259[16]; > } MaltaState; > > static ISADevice *pit; > @@ -1235,8 +1235,8 @@ void mips_malta_init(MachineState *machine) > int64_t kernel_entry, bootloader_run_addr; > PCIBus *pci_bus; > ISABus *isa_bus; > - qemu_irq *isa_irq; > qemu_irq cbus_irq, i8259_irq; > + PCIDevice *pci; > int piix4_devfn; > I2CBus *smbus; > DriveInfo *dinfo; > @@ -1407,30 +1407,24 @@ void mips_malta_init(MachineState *machine) > /* Board ID =3D 0x420 (Malta Board with CoreLV) */ > stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); > > - /* > - * We have a circular dependency problem: pci_bus depends on isa_irq= , > - * isa_irq is provided by i8259, i8259 depends on ISA, ISA depends > - * on piix4, and piix4 depends on pci_bus. To stop the cycle we hav= e > - * qemu_irq_proxy() adds an extra bit of indirection, allowing us > - * to resolve the isa_irq -> i8259 dependency after i8259 is > initialized. > - */ > - isa_irq =3D qemu_irq_proxy(&s->i8259, 16); > - > /* Northbridge */ > - pci_bus =3D gt64120_register(isa_irq); > + pci_bus =3D gt64120_register(s->i8259); > > /* Southbridge */ > ide_drive_get(hd, ARRAY_SIZE(hd)); > > - piix4_devfn =3D piix4_init(pci_bus, &isa_bus, 80); > + pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), > + true, "PIIX4"); > + dev =3D DEVICE(pci); > + isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); > + piix4_devfn =3D pci->devfn; > > - /* > - * Interrupt controller > - * The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 > - */ > - s->i8259 =3D i8259_init(isa_bus, i8259_irq); > + /* Interrupt controller */ > + qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); > + for (int i =3D 0; i < ISA_NUM_IRQS; i++) { > + s->i8259[i] =3D qdev_get_gpio_in_named(dev, "isa", i); > + } > > - isa_bus_irqs(isa_bus, s->i8259); > pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); > pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci"); > smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, > diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h > index 37bfd95113..374f3e8835 100644 > --- a/include/hw/i386/pc.h > +++ b/include/hw/i386/pc.h > @@ -286,7 +286,6 @@ PCIBus *i440fx_init(const char *host_type, const char > *pci_type, > PCIBus *find_i440fx(void); > /* piix4.c */ > extern PCIDevice *piix4_dev; > -int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); > > /* pc_sysfw.c */ > void pc_system_flash_create(PCMachineState *pcms); > -- > 2.21.0 > > > --0000000000008a47d105957cc71c Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

On Friday, October 18, 2019, Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com> wrote:
From: Herv=C3=A9 Poussineau <hpoussin@reactos.org>

Add ISA irqs as piix4 gpio in, and CPU interrupt request as piix4 gpio out.=
Remove i8259 instanciated in malta board, to not have it twice.

We can also remove the now unused piix4_init() function.

Acked-by: Michael S. Tsirkin <mst@redh= at.com>
Acked-by: Paolo Bonzini <pbonzini= @redhat.com>
Signed-off-by: Herv=C3=A9 Poussineau <hpoussin@reactos.org>
Message-Id: <20171216090228.28505-8-hpoussin@reactos.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
[PMD: rebased, updated includes, use ISA_NUM_IRQS in for loop]
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com>
---
=C2=A0hw/isa/piix4.c=C2=A0 =C2=A0 =C2=A0 =C2=A0| 43 +++++++++++++++++++++++= +++++++++-----------
=C2=A0hw/mips/mips_malta.c | 32 +++++++++++++-------------------
=C2=A0include/hw/i386/pc.h |=C2=A0 1 -
=C2=A03 files changed, 45 insertions(+), 31 deletions(-)



A detail: In the title:= =C2=A0
Add a i8259=C2=A0 -> Add an i8259

A.
=C2=A0
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index d0b18e0586..9c37c85ae2 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -24,6 +24,7 @@
=C2=A0 */

=C2=A0#include "qemu/osdep.h"
+#include "hw/irq.h"
=C2=A0#include "hw/i386/pc.h"
=C2=A0#include "hw/pci/pci.h"
=C2=A0#include "hw/isa/isa.h"
@@ -36,6 +37,8 @@ PCIDevice *piix4_dev;

=C2=A0typedef struct PIIX4State {
=C2=A0 =C2=A0 =C2=A0PCIDevice dev;
+=C2=A0 =C2=A0 qemu_irq cpu_intr;
+=C2=A0 =C2=A0 qemu_irq *isa;

=C2=A0 =C2=A0 =C2=A0/* Reset Control Register */
=C2=A0 =C2=A0 =C2=A0MemoryRegion rcr_mem;
@@ -94,6 +97,18 @@ static const VMStateDescription vmstate_piix4 =3D {
=C2=A0 =C2=A0 =C2=A0}
=C2=A0};

+static void piix4_request_i8259_irq(void *opaque, int irq, int level)
+{
+=C2=A0 =C2=A0 PIIX4State *s =3D opaque;
+=C2=A0 =C2=A0 qemu_set_irq(s->cpu_intr, level);
+}
+
+static void piix4_set_i8259_irq(void *opaque, int irq, int level)
+{
+=C2=A0 =C2=A0 PIIX4State *s =3D opaque;
+=C2=A0 =C2=A0 qemu_set_irq(s->isa[irq], level);
+}
+
=C2=A0static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,<= br> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned int len)
=C2=A0{
@@ -127,29 +142,35 @@ static const MemoryRegionOps piix4_rcr_ops =3D {
=C2=A0static void piix4_realize(PCIDevice *dev, Error **errp)
=C2=A0{
=C2=A0 =C2=A0 =C2=A0PIIX4State *s =3D PIIX4_PCI_DEVICE(dev);
+=C2=A0 =C2=A0 ISABus *isa_bus;
+=C2=A0 =C2=A0 qemu_irq *i8259_out_irq;

-=C2=A0 =C2=A0 if (!isa_bus_new(DEVICE(dev), pci_address_space(dev),
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0pci_address_space_io(dev), errp)) {
+=C2=A0 =C2=A0 isa_bus =3D isa_bus_new(DEVICE(dev), pci_address_space(dev),=
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 pci_address_space_io(dev), errp);
+=C2=A0 =C2=A0 if (!isa_bus) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return;
=C2=A0 =C2=A0 =C2=A0}

+=C2=A0 =C2=A0 qdev_init_gpio_in_named(DEVICE(dev), piix4_set_i8259_ir= q,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 "isa", ISA_NUM_IRQS);
+=C2=A0 =C2=A0 qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_in= tr,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0"intr", 1);
+
=C2=A0 =C2=A0 =C2=A0memory_region_init_io(&s->rcr_mem, OBJECT(d= ev), &piix4_rcr_ops, s,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0"reset-control", 1);
=C2=A0 =C2=A0 =C2=A0memory_region_add_subregion_overlap(pci_address_sp= ace_io(dev), 0xcf9,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0&a= mp;s->rcr_mem, 1);

+=C2=A0 =C2=A0 /* initialize i8259 pic */
+=C2=A0 =C2=A0 i8259_out_irq =3D qemu_allocate_irqs(piix4_request_i825= 9_irq, s, 1);
+=C2=A0 =C2=A0 s->isa =3D i8259_init(isa_bus, *i8259_out_irq);
+
+=C2=A0 =C2=A0 /* initialize ISA irqs */
+=C2=A0 =C2=A0 isa_bus_irqs(isa_bus, s->isa);
+
=C2=A0 =C2=A0 =C2=A0piix4_dev =3D dev;
=C2=A0}

-int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn)
-{
-=C2=A0 =C2=A0 PCIDevice *d;
-
-=C2=A0 =C2=A0 d =3D pci_create_simple_multifunction(bus, devfn, true,= "PIIX4");
-=C2=A0 =C2=A0 *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(d), &quo= t;isa.0"));
-=C2=A0 =C2=A0 return d->devfn;
-}
-
=C2=A0static void piix4_class_init(ObjectClass *klass, void *data)
=C2=A0{
=C2=A0 =C2=A0 =C2=A0DeviceClass *dc =3D DEVICE_CLASS(klass);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 4d9c64b36a..7d25ab6c23 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -97,7 +97,7 @@ typedef struct {
=C2=A0 =C2=A0 =C2=A0SysBusDevice parent_obj;

=C2=A0 =C2=A0 =C2=A0MIPSCPSState cps;
-=C2=A0 =C2=A0 qemu_irq *i8259;
+=C2=A0 =C2=A0 qemu_irq i8259[16];
=C2=A0} MaltaState;

=C2=A0static ISADevice *pit;
@@ -1235,8 +1235,8 @@ void mips_malta_init(MachineState *machine)
=C2=A0 =C2=A0 =C2=A0int64_t kernel_entry, bootloader_run_addr;
=C2=A0 =C2=A0 =C2=A0PCIBus *pci_bus;
=C2=A0 =C2=A0 =C2=A0ISABus *isa_bus;
-=C2=A0 =C2=A0 qemu_irq *isa_irq;
=C2=A0 =C2=A0 =C2=A0qemu_irq cbus_irq, i8259_irq;
+=C2=A0 =C2=A0 PCIDevice *pci;
=C2=A0 =C2=A0 =C2=A0int piix4_devfn;
=C2=A0 =C2=A0 =C2=A0I2CBus *smbus;
=C2=A0 =C2=A0 =C2=A0DriveInfo *dinfo;
@@ -1407,30 +1407,24 @@ void mips_malta_init(MachineState *machine)
=C2=A0 =C2=A0 =C2=A0/* Board ID =3D 0x420 (Malta Board with CoreLV) */
=C2=A0 =C2=A0 =C2=A0stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10,= 0x00000420);

-=C2=A0 =C2=A0 /*
-=C2=A0 =C2=A0 =C2=A0* We have a circular dependency problem: pci_bus depen= ds on isa_irq,
-=C2=A0 =C2=A0 =C2=A0* isa_irq is provided by i8259, i8259 depends on ISA, = ISA depends
-=C2=A0 =C2=A0 =C2=A0* on piix4, and piix4 depends on pci_bus.=C2=A0 To sto= p the cycle we have
-=C2=A0 =C2=A0 =C2=A0* qemu_irq_proxy() adds an extra bit of indirection, a= llowing us
-=C2=A0 =C2=A0 =C2=A0* to resolve the isa_irq -> i8259 dependency after = i8259 is initialized.
-=C2=A0 =C2=A0 =C2=A0*/
-=C2=A0 =C2=A0 isa_irq =3D qemu_irq_proxy(&s->i8259, 16);
-
=C2=A0 =C2=A0 =C2=A0/* Northbridge */
-=C2=A0 =C2=A0 pci_bus =3D gt64120_register(isa_irq);
+=C2=A0 =C2=A0 pci_bus =3D gt64120_register(s->i8259);

=C2=A0 =C2=A0 =C2=A0/* Southbridge */
=C2=A0 =C2=A0 =C2=A0ide_drive_get(hd, ARRAY_SIZE(hd));

-=C2=A0 =C2=A0 piix4_devfn =3D piix4_init(pci_bus, &isa_bus, 80);
+=C2=A0 =C2=A0 pci =3D pci_create_simple_multifunction(pci_bus, PCI_DE= VFN(10, 0),
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 t= rue, "PIIX4");
+=C2=A0 =C2=A0 dev =3D DEVICE(pci);
+=C2=A0 =C2=A0 isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0= "));
+=C2=A0 =C2=A0 piix4_devfn =3D pci->devfn;

-=C2=A0 =C2=A0 /*
-=C2=A0 =C2=A0 =C2=A0* Interrupt controller
-=C2=A0 =C2=A0 =C2=A0* The 8259 is attached to the MIPS CPU INT0 pin, ie in= terrupt 2
-=C2=A0 =C2=A0 =C2=A0*/
-=C2=A0 =C2=A0 s->i8259 =3D i8259_init(isa_bus, i8259_irq);
+=C2=A0 =C2=A0 /* Interrupt controller */
+=C2=A0 =C2=A0 qdev_connect_gpio_out_named(dev, "intr", 0, i= 8259_irq);
+=C2=A0 =C2=A0 for (int i =3D 0; i < ISA_NUM_IRQS; i++) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 s->i8259[i] =3D qdev_get_gpio_in_named(dev,= "isa", i);
+=C2=A0 =C2=A0 }

-=C2=A0 =C2=A0 isa_bus_irqs(isa_bus, s->i8259);
=C2=A0 =C2=A0 =C2=A0pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
=C2=A0 =C2=A0 =C2=A0pci_create_simple(pci_bus, piix4_devfn + 2, "piix4= -usb-uhci");
=C2=A0 =C2=A0 =C2=A0smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x110= 0,
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 37bfd95113..374f3e8835 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -286,7 +286,6 @@ PCIBus *i440fx_init(const char *host_type, const char *= pci_type,
=C2=A0PCIBus *find_i440fx(void);
=C2=A0/* piix4.c */
=C2=A0extern PCIDevice *piix4_dev;
-int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);

=C2=A0/* pc_sysfw.c */
=C2=A0void pc_system_flash_create(PCMachineState *pcms);
--
2.21.0


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