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From: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: stefan.brankovic@rt-rk.com,
	"qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>,
	Paul Clarke <pc@us.ibm.com>, qemu-devel <qemu-devel@nongnu.org>
Subject: Re: target/ppc: bug in optimised vsl/vsr implementation?
Date: Mon, 30 Sep 2019 16:37:23 +0200	[thread overview]
Message-ID: <CAL1e-=icPjx3=wD=D7s4qhHgS1nTBgt2xPwvycEjtJu9+yo4ag@mail.gmail.com> (raw)
In-Reply-To: <CAL1e-=gcK2mdtrt9vibHGpbm4_FZgQWTA91+p=9ouuMYmZwPqQ@mail.gmail.com>

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> 5. (a question for Mark) After all recent changes, does get_avr64(...,
..., true) always (for any endian configuration) return the "high" half of
an Altivec register, and get_avr64(..., ..., false) the "low" one?
>
> Given all these circumstances, perhaps the most reasonable solution would
be to revert the commit in question, and allow Stefan enough dev and test
time to hopefully submit a new, better, version later on.
>

Mark, can you verify please that this is true? The thing is, 'vsl/vsr'
belong to the group of SIMD instructions where the distinction between
'high' and 'low' 64-bit halves of the source and destination registers is
important (as opposed to the majority of 'regular' SIMD instructions, like
vector addition, vector max/min, etc., that act only as parallel operations
on corresdponding data elements).

Regards, Aleksandar

> Sincerely,
> Aleksandar
>

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  parent reply	other threads:[~2019-09-30 14:38 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-26 18:04 target/ppc: bug in optimised vsl/vsr implementation? Mark Cave-Ayland
2019-09-28 17:45 ` Aleksandar Markovic
2019-09-28 22:17   ` Aleksandar Markovic
2019-09-30 14:34     ` Paul Clarke
2019-09-30 14:53       ` Aleksandar Markovic
2019-09-30 14:37   ` Aleksandar Markovic [this message]
2019-10-01 18:24   ` Mark Cave-Ayland
2019-10-02 14:08     ` Stefan Brankovic
2019-10-03 11:11       ` Stefan Brankovic
2019-10-02 17:38     ` Alex Bennée
2019-10-02 19:40       ` Richard Henderson
2019-10-02 19:55         ` Paul Clarke
2019-10-04 19:32           ` Aleksandar Markovic

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