From: Palmer Dabbelt <palmer@sifive.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: QEMU riscv <qemu-riscv@nongnu.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmer@sifive.com>,
Richard Henderson <richard.henderson@linaro.org>,
QEMU devel <qemu-devel@nongnu.org>,
Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [Qemu-devel] [PATCH] riscv: rv32: Root page table address can be larger than 32-bit
Date: Wed, 7 Aug 2019 13:55:23 -0700
Message-ID: <CANs6eMkRQ1-Gb42DhHGz++4Q79JbH4S3MnccwmwKKEB-sdozag@mail.gmail.com> (raw)
In-Reply-To: <CAEUhbmX2C_FbW_m=Mri19hpz0c74SQTt3ogsatGgveH09t3_4g@mail.gmail.com>
On Thu, Aug 1, 2019 at 7:58 AM Bin Meng <bmeng.cn@gmail.com> wrote:
> On Thu, Aug 1, 2019 at 10:16 PM Richard Henderson
> <richard.henderson@linaro.org> wrote:
> >
> > On 7/31/19 6:53 PM, Bin Meng wrote:
> > > I am not sure how (idx * ptesize) could overflow. It represents the
> > > offset by a page table which is [0, 4096).
> >
> > You're right, I mis-read what was going on there.
> >
> > However, lower down, "target_ulong ppn" needs to be promoted to hwaddr,
> so that
> >
> > ppn = pte >> PTE_PPN_SHIFT;
> > ...
> > base = ppn << PGSHIFT;
> >
> > does not overflow. (Which is the part of the page table walk that I
> thought I
> > had gleaned from the patch without actually reading the entire function.)
>
> Ah, yes. ppn should be promoted. Thanks for the review!
>
Did I miss a v2?
next prev parent reply index
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-31 12:45 Bin Meng
2019-07-31 17:35 ` Richard Henderson
2019-08-01 1:53 ` Bin Meng
2019-08-01 14:16 ` Richard Henderson
2019-08-01 14:57 ` Bin Meng
2019-08-07 20:55 ` Palmer Dabbelt [this message]
2019-08-08 1:49 ` Bin Meng
2019-08-08 2:49 ` [Qemu-devel] [PATCH v2] " Bin Meng
2019-08-10 1:49 ` Alistair Francis
2019-08-14 9:46 ` Bin Meng
2019-08-19 6:00 ` Bin Meng
2019-08-27 23:37 ` Palmer Dabbelt
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