From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE8FAC43603 for ; Wed, 18 Dec 2019 20:50:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 744A32176D for ; Wed, 18 Dec 2019 20:50:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="N3nmx0KF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 744A32176D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:60524 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ihgH8-0006ED-Lw for qemu-devel@archiver.kernel.org; Wed, 18 Dec 2019 15:50:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59028) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ihgGG-0005jQ-2i for qemu-devel@nongnu.org; Wed, 18 Dec 2019 15:49:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ihgGC-0006VG-Ar for qemu-devel@nongnu.org; Wed, 18 Dec 2019 15:49:35 -0500 Received: from mail-il1-x141.google.com ([2607:f8b0:4864:20::141]:36436) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ihgGB-0006S4-T6; Wed, 18 Dec 2019 15:49:32 -0500 Received: by mail-il1-x141.google.com with SMTP id b15so2884251iln.3; Wed, 18 Dec 2019 12:49:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=iWtEX5iWpfFX5/5aJLaNvyTdKGsb22z6bJhbArJSwiE=; b=N3nmx0KFkypTD+KP24XDB4xd9WyaUu93VbNdo/yjD2pMqVko+uXPk0CHrOHAOK6uTa qReru/+FdKJ7KFL9yT0f5RGO238uK4VRsojWE2uuH2qwY0iIEZJUCWfWvEfg3GgHsuPC tNlkox6qpCGaRCcjvLe8wO/fD95yvr2sc5bcftDHV0LdjJJDhZycFNqYWhvGJ88C5auJ ri8EKELpb7LxlY5xuIfqeqkNYJB32Rc77pcoURsWgg54ka6jZa2DL85fBmrE5EAGamiF h7rIhx0hn+yYuffyrS9IBLrxypp5hxc8TvVlYvk+WJDJfP4EX43Eo3hUVgFz7Pm4++zp FOyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=iWtEX5iWpfFX5/5aJLaNvyTdKGsb22z6bJhbArJSwiE=; b=ErnadzqMCQiawgC4iz/XCxPcyvKc/eZNHqzWOnHJLldfwa2a/tee8mIDknaCe17yB5 VRSxhzx1WDz7tnMd3mtKd11txoQ4MLxXObeX/t/pmgzy9Rue42dz7P7Y/tkEMVKmmt0L 0FjDzYYbkKplxvaR6YcUSqBzvEVsSssoYGa0TWC9kVucbSYs+tEB2hUYonQt65rodSBm AbrR1yWnHmf5r8BKyVapV3tp14lZRsCl0mWgj2O0JEkZ2l32FORg6FV4itN/lacBxy0g bInAh+Q5XfLvF9ooFonO0YioikzoXBsZIgidK9eEW1sZ/sSM3+v0O4vKJg44zjGsZ7fM 5oFg== X-Gm-Message-State: APjAAAU2HmbD5ls1HCndNZZLrEieNNlEI3Prvuz3lYpK6YdS0xjenjyf j4DNDEGIjjaOsPfwpNwzv3dVjR+zuyasIUmP07w= X-Google-Smtp-Source: APXvYqzaaodGzAqIqWZPz2CrYnXD7dsyUeUpz8QRfLIYf8IKTU1xkkZxlruPFbPiqEDy2naR+D6IS4bJCxaMZ4AtscA= X-Received: by 2002:a92:c647:: with SMTP id 7mr3832792ill.28.1576702167837; Wed, 18 Dec 2019 12:49:27 -0800 (PST) MIME-Version: 1.0 References: <20191216233519.29030-1-nieklinnenbank@gmail.com> <20191216233519.29030-9-nieklinnenbank@gmail.com> <7153b766-4c3b-5272-3c3e-33e973e74e8f@redhat.com> In-Reply-To: <7153b766-4c3b-5272-3c3e-33e973e74e8f@redhat.com> From: Niek Linnenbank Date: Wed, 18 Dec 2019 21:49:15 +0100 Message-ID: Subject: Re: [PATCH v2 08/10] arm: allwinner-h3: add Security Identifier device To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="000000000000a170b4059a0094dc" X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::141 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --000000000000a170b4059a0094dc Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Philippe, On Tue, Dec 17, 2019 at 8:45 AM Philippe Mathieu-Daud=C3=A9 wrote: > Hi Niek, > > On 12/17/19 12:35 AM, Niek Linnenbank wrote: > > The Security Identifier device in Allwinner H3 System on Chip > > gives applications a per-board unique identifier. This commit > > adds support for the Allwinner H3 Security Identifier using > > a 128-bit UUID value as input. > > > > Signed-off-by: Niek Linnenbank > > --- > > include/hw/arm/allwinner-h3.h | 2 + > > include/hw/misc/allwinner-h3-sid.h | 40 +++++++ > > hw/arm/allwinner-h3.c | 7 ++ > > hw/arm/orangepi.c | 4 + > > hw/misc/allwinner-h3-sid.c | 179 ++++++++++++++++++++++++++++= + > > hw/misc/Makefile.objs | 1 + > > hw/misc/trace-events | 4 + > > 7 files changed, 237 insertions(+) > > create mode 100644 include/hw/misc/allwinner-h3-sid.h > > create mode 100644 hw/misc/allwinner-h3-sid.c > > > > diff --git a/include/hw/arm/allwinner-h3.h > b/include/hw/arm/allwinner-h3.h > > index 8128ae6131..c98c1972a6 100644 > > --- a/include/hw/arm/allwinner-h3.h > > +++ b/include/hw/arm/allwinner-h3.h > > @@ -29,6 +29,7 @@ > > #include "hw/misc/allwinner-h3-clk.h" > > #include "hw/misc/allwinner-h3-cpucfg.h" > > #include "hw/misc/allwinner-h3-syscon.h" > > +#include "hw/misc/allwinner-h3-sid.h" > > #include "target/arm/cpu.h" > > > > enum { > > @@ -77,6 +78,7 @@ typedef struct AwH3State { > > AwH3ClockState ccu; > > AwH3CpuCfgState cpucfg; > > AwH3SysconState syscon; > > + AwH3SidState sid; > > GICState gic; > > MemoryRegion sram_a1; > > MemoryRegion sram_a2; > > diff --git a/include/hw/misc/allwinner-h3-sid.h > b/include/hw/misc/allwinner-h3-sid.h > > new file mode 100644 > > index 0000000000..79c9a24459 > > --- /dev/null > > +++ b/include/hw/misc/allwinner-h3-sid.h > > @@ -0,0 +1,40 @@ > > +/* > > + * Allwinner H3 Security ID emulation > > + * > > + * Copyright (C) 2019 Niek Linnenbank > > + * > > + * This program is free software: you can redistribute it and/or modif= y > > + * it under the terms of the GNU General Public License as published b= y > > + * the Free Software Foundation, either version 2 of the License, or > > + * (at your option) any later version. > > + * > > + * This program is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > + * GNU General Public License for more details. > > + * > > + * You should have received a copy of the GNU General Public License > > + * along with this program. If not, see >. > > + */ > > + > > +#ifndef HW_MISC_ALLWINNER_H3_SID_H > > +#define HW_MISC_ALLWINNER_H3_SID_H > > + > > +#include "hw/sysbus.h" > > +#include "qemu/uuid.h" > > + > > +#define TYPE_AW_H3_SID "allwinner-h3-sid" > > +#define AW_H3_SID(obj) OBJECT_CHECK(AwH3SidState, (obj), > TYPE_AW_H3_SID) > > + > > +typedef struct AwH3SidState { > > + /*< private >*/ > > + SysBusDevice parent_obj; > > + /*< public >*/ > > + > > + MemoryRegion iomem; > > + uint32_t control; > > + uint32_t rdkey; > > + QemuUUID identifier; > > +} AwH3SidState; > > + > > +#endif > > diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c > > index 1a9748ab2e..ba34f905cd 100644 > > --- a/hw/arm/allwinner-h3.c > > +++ b/hw/arm/allwinner-h3.c > > @@ -196,6 +196,9 @@ static void aw_h3_init(Object *obj) > > > > sysbus_init_child_obj(obj, "cpucfg", &s->cpucfg, sizeof(s->cpucfg= ), > > TYPE_AW_H3_CPUCFG); > > + > > + sysbus_init_child_obj(obj, "sid", &s->sid, sizeof(s->sid), > > + TYPE_AW_H3_SID); > > Here add a property alias: > > object_property_add_alias(obj, "identifier", OBJECT(&s->sid), > "identifier", &error_abort); > > > } > > > > static void aw_h3_realize(DeviceState *dev, Error **errp) > > @@ -332,6 +335,10 @@ static void aw_h3_realize(DeviceState *dev, Error > **errp) > > qdev_init_nofail(DEVICE(&s->cpucfg)); > > sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, > s->memmap[AW_H3_CPUCFG]); > > > > + /* Security Identifier */ > > + qdev_init_nofail(DEVICE(&s->sid)); > > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s->memmap[AW_H3_SID]); > > + > > /* Universal Serial Bus */ > > sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI0], > > qdev_get_gpio_in(DEVICE(&s->gic), > > diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c > > index 62cefc8c06..b01c4b4f01 100644 > > --- a/hw/arm/orangepi.c > > +++ b/hw/arm/orangepi.c > > @@ -62,6 +62,10 @@ static void orangepi_init(MachineState *machine) > > exit(1); > > } > > > > + /* Setup SID properties */ > > + qdev_prop_set_string(DEVICE(&s->h3->sid), "identifier", > > + "8100c002-0001-0002-0003-000044556677"); > > And here use the alias: > > qdev_prop_set_string(DEVICE(&s->h3), "identifier", > "8100c002-0001-0002-0003-000044556677"); > Ah OK, I see what you mean. The boards should be using the SoC object only and not directly any of its sub devices, correct? > > What means this value? Don't you want to be able to set it from command > line? > The first word 0x02c00081 is the identifying word for the H3 SoC in the SID data. After that come the per-device unique specific bytes. This is documented at the end of this page in 'Currently known SID's' on the linux-sunxi.org Wiki= : https://linux-sunxi.org/SID_Register_Guide The remaining parts of this value I simply made up without any real meaning= . And yes, it would in fact make sense to have the user be able to override it from the command line. It is used by U-boot as an input for generating the MAC address. Linux also reads it, but I did not investigate how it us used there. I think I did make a TODO of using a cmdline argument, but later forgot to actually implement it. Do you have a suggestion how to best provide the command line argument? I do see '-device driver[,prop=3Dvalue]' is there in the --help for qemu-system-arm, but it looks like that should be used by the user for adding PCI / USB devices? > > /* Mark H3 object realized */ > > object_property_set_bool(OBJECT(s->h3), true, "realized", > &error_abort); > > if (error_abort !=3D NULL) { > > diff --git a/hw/misc/allwinner-h3-sid.c b/hw/misc/allwinner-h3-sid.c > > new file mode 100644 > > index 0000000000..c472f2bcc6 > > --- /dev/null > > +++ b/hw/misc/allwinner-h3-sid.c > > @@ -0,0 +1,179 @@ > > +/* > > + * Allwinner H3 Security ID emulation > > + * > > + * Copyright (C) 2019 Niek Linnenbank > > + * > > + * This program is free software: you can redistribute it and/or modif= y > > + * it under the terms of the GNU General Public License as published b= y > > + * the Free Software Foundation, either version 2 of the License, or > > + * (at your option) any later version. > > + * > > + * This program is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > + * GNU General Public License for more details. > > + * > > + * You should have received a copy of the GNU General Public License > > + * along with this program. If not, see >. > > + */ > > + > > +#include "qemu/osdep.h" > > +#include "qemu/units.h" > > +#include "hw/sysbus.h" > > +#include "migration/vmstate.h" > > +#include "qemu/log.h" > > +#include "qemu/module.h" > > +#include "qemu/guest-random.h" > > +#include "qapi/error.h" > > +#include "hw/qdev-properties.h" > > +#include "hw/misc/allwinner-h3-sid.h" > > +#include "trace.h" > > + > > +/* SID register offsets */ > > +enum { > > + REG_PRCTL =3D 0x40, /* Control */ > > + REG_RDKEY =3D 0x60, /* Read Key */ > > +}; > > + > > +/* SID register flags */ > > +enum { > > + REG_PRCTL_WRITE =3D 0x0002, /* Unknown write flag */ > > + REG_PRCTL_OP_LOCK =3D 0xAC00, /* Lock operation */ > > +}; > > + > > +static uint64_t allwinner_h3_sid_read(void *opaque, hwaddr offset, > > + unsigned size) > > +{ > > + const AwH3SidState *s =3D (AwH3SidState *)opaque; > > + uint64_t val =3D 0; > > + > > + switch (offset) { > > + case REG_PRCTL: /* Control */ > > + val =3D s->control; > > + break; > > + case REG_RDKEY: /* Read Key */ > > + val =3D s->rdkey; > > + break; > > + default: > > + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad read offset 0x%04x\n", > > + __func__, (uint32_t)offset); > > + return 0; > > + } > > + > > + trace_allwinner_h3_sid_read(offset, val, size); > > + > > + return val; > > +} > > + > > +static void allwinner_h3_sid_write(void *opaque, hwaddr offset, > > + uint64_t val, unsigned size) > > +{ > > + AwH3SidState *s =3D (AwH3SidState *)opaque; > > + > > + trace_allwinner_h3_sid_write(offset, val, size); > > + > > + switch (offset) { > > + case REG_PRCTL: /* Control */ > > + s->control =3D val; > > + > > + if ((s->control & REG_PRCTL_OP_LOCK) && > > + (s->control & REG_PRCTL_WRITE)) { > > + uint32_t id =3D s->control >> 16; > > + > > + if (id < sizeof(QemuUUID)) { > > + s->rdkey =3D (s->identifier.data[id]) | > > + (s->identifier.data[id + 1] << 8) | > > + (s->identifier.data[id + 2] << 16) | > > + (s->identifier.data[id + 3] << 24); > > This is: > > s->rdkey =3D ldl_le_p(&s->identifier.data[id]); > > > + } > > + } > > + s->control &=3D ~REG_PRCTL_WRITE; > > + break; > > + case REG_RDKEY: /* Read Key */ > > Read in a write()? > > Maybe we can simply /* fall through */ LOG_GUEST_ERROR? > When writing this module, I looked at how U-Boot is using the SID registers and simply named the registers after the names used by U-Boot. You can find this part in arch/arm/mach-sunxi/cpu_info.c:111, functions sun8i_efuse_read() and sunxi_get_sid(). U-Boot defines SIDC_RDKEY, so I named the register also rdkey. I used the U-Boot source because the Allwinner H3 datasheet does not document the registers. Later I found the SID page on the linux-sunxi wiki that I mentioned earlier, and they also describe the same register names: https://linux-sunxi.org/SID_Register_Guide I suspect the information on this page is written based on the source code from the original SDK (which I did not study btw) > > > + break; > > + default: > > + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write offset 0x%04x\n"= , > > + __func__, (uint32_t)offset); > > + break; > > + } > > +} > > + > > +static const MemoryRegionOps allwinner_h3_sid_ops =3D { > > + .read =3D allwinner_h3_sid_read, > > + .write =3D allwinner_h3_sid_write, > > + .endianness =3D DEVICE_NATIVE_ENDIAN, > > + .valid =3D { > > + .min_access_size =3D 4, > > + .max_access_size =3D 4, > > + .unaligned =3D false > > 'false' is the default value, maybe we can omit it? > Sure, I'll remove it. > > > + }, > > + .impl.min_access_size =3D 4, > > +}; > > + > > +static void allwinner_h3_sid_reset(DeviceState *dev) > > +{ > > + AwH3SidState *s =3D AW_H3_SID(dev); > > + > > + /* Set default values for registers */ > > + s->control =3D 0; > > + s->rdkey =3D 0; > > +} > > + > > +static void allwinner_h3_sid_realize(DeviceState *dev, Error **errp) > > +{ > > +} > > If you don't need realize(), just remove it. However maybe we want to > check if the identifier is null, either warn/abort or generate a random > one? > OK, removing it! > > > + > > +static void allwinner_h3_sid_init(Object *obj) > > +{ > > + SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); > > + AwH3SidState *s =3D AW_H3_SID(obj); > > + > > + /* Fill UUID with zeroes by default */ > > + qemu_uuid_parse(UUID_NONE, &s->identifier); > > AwH3SidState is zeroed just before this init() call. I think we don't > need to zeroes the UUID again. > Ah OK, so you mean new objects are always zeroed. That makes it much easier indeed. Thanks, I'll remove those lines. > > > + > > + /* Memory mapping */ > > + memory_region_init_io(&s->iomem, OBJECT(s), &allwinner_h3_sid_ops, > s, > > + TYPE_AW_H3_SID, 1 * KiB); > > + sysbus_init_mmio(sbd, &s->iomem); > > +} > > + > > +static Property allwinner_h3_sid_properties[] =3D { > > + DEFINE_PROP_UUID_NODEFAULT("identifier", AwH3SidState, identifier)= , > > + DEFINE_PROP_END_OF_LIST() > > +}; > > + > > +static const VMStateDescription allwinner_h3_sid_vmstate =3D { > > + .name =3D "allwinner-h3-sid", > > + .version_id =3D 1, > > + .minimum_version_id =3D 1, > > + .fields =3D (VMStateField[]) { > > + VMSTATE_UINT32(control, AwH3SidState), > > + VMSTATE_UINT32(rdkey, AwH3SidState), > > + VMSTATE_END_OF_LIST() > > + } > > +}; > > + > > +static void allwinner_h3_sid_class_init(ObjectClass *klass, void *data= ) > > +{ > > + DeviceClass *dc =3D DEVICE_CLASS(klass); > > + > > + dc->reset =3D allwinner_h3_sid_reset; > > + dc->realize =3D allwinner_h3_sid_realize; > > + dc->vmsd =3D &allwinner_h3_sid_vmstate; > > + dc->props =3D allwinner_h3_sid_properties; > > +} > > + > > +static const TypeInfo allwinner_h3_sid_info =3D { > > + .name =3D TYPE_AW_H3_SID, > > + .parent =3D TYPE_SYS_BUS_DEVICE, > > + .instance_init =3D allwinner_h3_sid_init, > > + .instance_size =3D sizeof(AwH3SidState), > > + .class_init =3D allwinner_h3_sid_class_init, > > +}; > > + > > +static void allwinner_h3_sid_register(void) > > +{ > > + type_register_static(&allwinner_h3_sid_info); > > +} > > + > > +type_init(allwinner_h3_sid_register) > > diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs > > index c4ca2ed689..f3620eee4e 100644 > > --- a/hw/misc/Makefile.objs > > +++ b/hw/misc/Makefile.objs > > @@ -31,6 +31,7 @@ common-obj-$(CONFIG_IVSHMEM_DEVICE) +=3D ivshmem.o > > common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-clk.o > > obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-cpucfg.o > > common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-syscon.o > > +common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-sid.o > > common-obj-$(CONFIG_REALVIEW) +=3D arm_sysctl.o > > common-obj-$(CONFIG_NSERIES) +=3D cbus.o > > common-obj-$(CONFIG_ECCMEMCTL) +=3D eccmemctl.o > > diff --git a/hw/misc/trace-events b/hw/misc/trace-events > > index b93089d010..a777844ca3 100644 > > --- a/hw/misc/trace-events > > +++ b/hw/misc/trace-events > > @@ -5,6 +5,10 @@ allwinner_h3_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t > reset_addr) "H3-CPUCFG: c > > allwinner_h3_cpucfg_read(uint64_t offset, uint64_t data, unsigned > size) "H3-CPUCFG: read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" > PRIu32 > > allwinner_h3_cpucfg_write(uint64_t offset, uint64_t data, unsigned > size) "H3-CPUCFG: write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" > PRIu32 > > > > +# allwinner-h3-sid.c > > +allwinner_h3_sid_read(uint64_t offset, uint64_t data, unsigned size) > "H3-SID: read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 > > +allwinner_h3_sid_write(uint64_t offset, uint64_t data, unsigned size) > "H3-SID: write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 > > + > > # eccmemctl.c > > ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" > > ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" > > > > Regards, Niek --=20 Niek Linnenbank --000000000000a170b4059a0094dc Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Philippe,

=
On Tue, Dec 17, 2019 at 8:45 AM Phili= ppe Mathieu-Daud=C3=A9 <philmd@redh= at.com> wrote:
Hi Niek,

On 12/17/19 12:35 AM, Niek Linnenbank wrote:
> The Security Identifier device in Allwinner H3 System on Chip
> gives applications a per-board unique identifier. This commit
> adds support for the Allwinner H3 Security Identifier using
> a 128-bit UUID value as input.
>
> Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>
> ---
>=C2=A0 =C2=A0include/hw/arm/allwinner-h3.h=C2=A0 =C2=A0 =C2=A0 |=C2=A0 = =C2=A02 +
>=C2=A0 =C2=A0include/hw/misc/allwinner-h3-sid.h |=C2=A0 40 +++++++
>=C2=A0 =C2=A0hw/arm/allwinner-h3.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 =C2=A07 ++
>=C2=A0 =C2=A0hw/arm/orangepi.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 |=C2=A0 =C2=A04 +
>=C2=A0 =C2=A0hw/misc/allwinner-h3-sid.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0| 179 +++++++++++++++++++++++++++++
>=C2=A0 =C2=A0hw/misc/Makefile.objs=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 =C2=A01 +
>=C2=A0 =C2=A0hw/misc/trace-events=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0|=C2=A0 =C2=A04 +
>=C2=A0 =C2=A07 files changed, 237 insertions(+)
>=C2=A0 =C2=A0create mode 100644 include/hw/misc/allwinner-h3-sid.h
>=C2=A0 =C2=A0create mode 100644 hw/misc/allwinner-h3-sid.c
>
> diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-= h3.h
> index 8128ae6131..c98c1972a6 100644
> --- a/include/hw/arm/allwinner-h3.h
> +++ b/include/hw/arm/allwinner-h3.h
> @@ -29,6 +29,7 @@
>=C2=A0 =C2=A0#include "hw/misc/allwinner-h3-clk.h"
>=C2=A0 =C2=A0#include "hw/misc/allwinner-h3-cpucfg.h"
>=C2=A0 =C2=A0#include "hw/misc/allwinner-h3-syscon.h"
> +#include "hw/misc/allwinner-h3-sid.h"
>=C2=A0 =C2=A0#include "target/arm/cpu.h"
>=C2=A0 =C2=A0
>=C2=A0 =C2=A0enum {
> @@ -77,6 +78,7 @@ typedef struct AwH3State {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AwH3ClockState ccu;
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AwH3CpuCfgState cpucfg;
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AwH3SysconState syscon;
> +=C2=A0 =C2=A0 AwH3SidState sid;
>=C2=A0 =C2=A0 =C2=A0 =C2=A0GICState gic;
>=C2=A0 =C2=A0 =C2=A0 =C2=A0MemoryRegion sram_a1;
>=C2=A0 =C2=A0 =C2=A0 =C2=A0MemoryRegion sram_a2;
> diff --git a/include/hw/misc/allwinner-h3-sid.h b/include/hw/misc/allw= inner-h3-sid.h
> new file mode 100644
> index 0000000000..79c9a24459
> --- /dev/null
> +++ b/include/hw/misc/allwinner-h3-sid.h
> @@ -0,0 +1,40 @@
> +/*
> + * Allwinner H3 Security ID emulation
> + *
> + * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
> + *
> + * This program is free software: you can redistribute it and/or modi= fy
> + * it under the terms of the GNU General Public License as published = by
> + * the Free Software Foundation, either version 2 of the License, or<= br> > + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.=C2=A0 See the=
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License<= br> > + * along with this program.=C2=A0 If not, see <http://www.gnu.o= rg/licenses/>.
> + */
> +
> +#ifndef HW_MISC_ALLWINNER_H3_SID_H
> +#define HW_MISC_ALLWINNER_H3_SID_H
> +
> +#include "hw/sysbus.h"
> +#include "qemu/uuid.h"
> +
> +#define TYPE_AW_H3_SID=C2=A0 =C2=A0 "allwinner-h3-sid"
> +#define AW_H3_SID(obj)=C2=A0 =C2=A0 OBJECT_CHECK(AwH3SidState, (obj),= TYPE_AW_H3_SID)
> +
> +typedef struct AwH3SidState {
> +=C2=A0 =C2=A0 /*< private >*/
> +=C2=A0 =C2=A0 SysBusDevice parent_obj;
> +=C2=A0 =C2=A0 /*< public >*/
> +
> +=C2=A0 =C2=A0 MemoryRegion iomem;
> +=C2=A0 =C2=A0 uint32_t control;
> +=C2=A0 =C2=A0 uint32_t rdkey;
> +=C2=A0 =C2=A0 QemuUUID identifier;
> +} AwH3SidState;
> +
> +#endif
> diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c
> index 1a9748ab2e..ba34f905cd 100644
> --- a/hw/arm/allwinner-h3.c
> +++ b/hw/arm/allwinner-h3.c
> @@ -196,6 +196,9 @@ static void aw_h3_init(Object *obj)
>=C2=A0 =C2=A0
>=C2=A0 =C2=A0 =C2=A0 =C2=A0sysbus_init_child_obj(obj, "cpucfg"= ;, &s->cpucfg, sizeof(s->cpucfg),
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0TYPE_AW_H3_CPUCFG);
> +
> +=C2=A0 =C2=A0 sysbus_init_child_obj(obj, "sid", &s->= sid, sizeof(s->sid),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 TYPE_AW_H3_SID);

Here add a property alias:

=C2=A0 =C2=A0 =C2=A0 =C2=A0 object_property_add_alias(obj, "identifier= ", OBJECT(&s->sid),
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 "identifier", &= error_abort);

>=C2=A0 =C2=A0}
>=C2=A0 =C2=A0
>=C2=A0 =C2=A0static void aw_h3_realize(DeviceState *dev, Error **errp)<= br> > @@ -332,6 +335,10 @@ static void aw_h3_realize(DeviceState *dev, Error= **errp)
>=C2=A0 =C2=A0 =C2=A0 =C2=A0qdev_init_nofail(DEVICE(&s->cpucfg));=
>=C2=A0 =C2=A0 =C2=A0 =C2=A0sysbus_mmio_map(SYS_BUS_DEVICE(&s->cp= ucfg), 0, s->memmap[AW_H3_CPUCFG]);
>=C2=A0 =C2=A0
> +=C2=A0 =C2=A0 /* Security Identifier */
> +=C2=A0 =C2=A0 qdev_init_nofail(DEVICE(&s->sid));
> +=C2=A0 =C2=A0 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s-&g= t;memmap[AW_H3_SID]);
> +
>=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Universal Serial Bus */
>=C2=A0 =C2=A0 =C2=A0 =C2=A0sysbus_create_simple(TYPE_AW_H3_EHCI, s->= memmap[AW_H3_EHCI0],
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 qdev_get_gpio_in(DEVICE(&s->gic),
> diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
> index 62cefc8c06..b01c4b4f01 100644
> --- a/hw/arm/orangepi.c
> +++ b/hw/arm/orangepi.c
> @@ -62,6 +62,10 @@ static void orangepi_init(MachineState *machine) >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0exit(1);
>=C2=A0 =C2=A0 =C2=A0 =C2=A0}
>=C2=A0 =C2=A0
> +=C2=A0 =C2=A0 /* Setup SID properties */
> +=C2=A0 =C2=A0 qdev_prop_set_string(DEVICE(&s->h3->sid), &qu= ot;identifier",
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0"8100c002-0001-0002-0003-000044556677");

And here use the alias:

=C2=A0 =C2=A0 =C2=A0 =C2=A0 qdev_prop_set_string(DEVICE(&s->h3), &qu= ot;identifier",
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0"8100c002-0001-0002-0003-000044556677&q= uot;);

Ah OK, I see what you mean. The = boards should be using the SoC object only and
not directly any o= f its sub devices, correct?

=C2=A0

What means this value? Don't you want to be able to set it from command=
line?
The first word 0x02c00081 is the identifying wor= d for the H3 SoC in the SID data.
After that come the per-device = unique specific bytes. This is documented at the end of this page in 'C= urrently known SID's' on the lin= ux-sunxi.org Wiki:

The remaining parts of this value I simply made up without= any real meaning.
And yes, it would in fact make sense to have t= he user be able to override it from the command line.
It is used = by U-boot as an input for generating the MAC address. Linux also reads it, = but I did not investigate
how it us used there. I think I did mak= e a TODO of using a cmdline argument, but later forgot to actually implemen= t it.

Do you have a suggestion how to best provide= the command line argument? I do see '-device driver[,prop=3Dvalue]'= ;
is there in the --help for qemu-system-arm, but it looks like t= hat should be used by the user for adding PCI / USB devices?
=

>=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Mark H3 object realized */
>=C2=A0 =C2=A0 =C2=A0 =C2=A0object_property_set_bool(OBJECT(s->h3), t= rue, "realized", &error_abort);
>=C2=A0 =C2=A0 =C2=A0 =C2=A0if (error_abort !=3D NULL) {
> diff --git a/hw/misc/allwinner-h3-sid.c b/hw/misc/allwinner-h3-sid.c > new file mode 100644
> index 0000000000..c472f2bcc6
> --- /dev/null
> +++ b/hw/misc/allwinner-h3-sid.c
> @@ -0,0 +1,179 @@
> +/*
> + * Allwinner H3 Security ID emulation
> + *
> + * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
> + *
> + * This program is free software: you can redistribute it and/or modi= fy
> + * it under the terms of the GNU General Public License as published = by
> + * the Free Software Foundation, either version 2 of the License, or<= br> > + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.=C2=A0 See the=
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License<= br> > + * along with this program.=C2=A0 If not, see <http://www.gnu.o= rg/licenses/>.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/units.h"
> +#include "hw/sysbus.h"
> +#include "migration/vmstate.h"
> +#include "qemu/log.h"
> +#include "qemu/module.h"
> +#include "qemu/guest-random.h"
> +#include "qapi/error.h"
> +#include "hw/qdev-properties.h"
> +#include "hw/misc/allwinner-h3-sid.h"
> +#include "trace.h"
> +
> +/* SID register offsets */
> +enum {
> +=C2=A0 =C2=A0 REG_PRCTL =3D 0x40,=C2=A0 =C2=A0/* Control */
> +=C2=A0 =C2=A0 REG_RDKEY =3D 0x60,=C2=A0 =C2=A0/* Read Key */
> +};
> +
> +/* SID register flags */
> +enum {
> +=C2=A0 =C2=A0 REG_PRCTL_WRITE=C2=A0 =C2=A0=3D 0x0002, /* Unknown writ= e flag */
> +=C2=A0 =C2=A0 REG_PRCTL_OP_LOCK =3D 0xAC00, /* Lock operation */
> +};
> +
> +static uint64_t allwinner_h3_sid_read(void *opaque, hwaddr offset, > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 unsigned si= ze)
> +{
> +=C2=A0 =C2=A0 const AwH3SidState *s =3D (AwH3SidState *)opaque;
> +=C2=A0 =C2=A0 uint64_t val =3D 0;
> +
> +=C2=A0 =C2=A0 switch (offset) {
> +=C2=A0 =C2=A0 case REG_PRCTL:=C2=A0 =C2=A0 /* Control */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 val =3D s->control;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> +=C2=A0 =C2=A0 case REG_RDKEY:=C2=A0 =C2=A0 /* Read Key */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 val =3D s->rdkey;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> +=C2=A0 =C2=A0 default:
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_log_mask(LOG_GUEST_ERROR, "%s: = bad read offset 0x%04x\n",
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 __func__, (uint32_t)offset);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
> +=C2=A0 =C2=A0 }
> +
> +=C2=A0 =C2=A0 trace_allwinner_h3_sid_read(offset, val, size);
> +
> +=C2=A0 =C2=A0 return val;
> +}
> +
> +static void allwinner_h3_sid_write(void *opaque, hwaddr offset,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0uint64_t val, unsig= ned size)
> +{
> +=C2=A0 =C2=A0 AwH3SidState *s =3D (AwH3SidState *)opaque;
> +
> +=C2=A0 =C2=A0 trace_allwinner_h3_sid_write(offset, val, size);
> +
> +=C2=A0 =C2=A0 switch (offset) {
> +=C2=A0 =C2=A0 case REG_PRCTL:=C2=A0 =C2=A0 /* Control */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 s->control =3D val;
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 if ((s->control & REG_PRCTL_OP_LOC= K) &&
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 (s->control & REG_PR= CTL_WRITE)) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 uint32_t id =3D s->contr= ol >> 16;
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (id < sizeof(QemuUUID= )) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->rdkey = =3D (s->identifier.data[id]) |
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.data[id + 1] << 8) | > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.data[id + 2] << 16) | > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.data[id + 3] << 24);
This is:

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->= ;rdkey =3D ldl_le_p(&s->identifier.data[id]);

> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 s->control &=3D ~REG_PRCTL_WRITE;<= br> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> +=C2=A0 =C2=A0 case REG_RDKEY:=C2=A0 =C2=A0 /* Read Key */

Read in a write()?

Maybe we can simply /* fall through */ LOG_GUEST_ERROR?

When writing this module, I looked at how U-Boot is using = the SID registers and simply
named the registers after the names = used by U-Boot. You can find this part in arch/arm/mach-sunxi/cpu_info.c:11= 1,
functions sun8i_efuse_read() and sunxi_get_sid(). U-Boot defin= es SIDC_RDKEY, so I named the register also rdkey.
I used the U-= Boot source because the Allwinner H3 datasheet does not document the regist= ers. Later I
found the SID page on the linux-sunxi wiki that I me= ntioned earlier, and they also describe the same register names:
<= div>

I suspect the information on this page is written based on the sou= rce code from the original SDK (which I did not study btw)
= =C2=A0

> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> +=C2=A0 =C2=A0 default:
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_log_mask(LOG_GUEST_ERROR, "%s: = bad write offset 0x%04x\n",
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 __func__, (uint32_t)offset);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> +=C2=A0 =C2=A0 }
> +}
> +
> +static const MemoryRegionOps allwinner_h3_sid_ops =3D {
> +=C2=A0 =C2=A0 .read =3D allwinner_h3_sid_read,
> +=C2=A0 =C2=A0 .write =3D allwinner_h3_sid_write,
> +=C2=A0 =C2=A0 .endianness =3D DEVICE_NATIVE_ENDIAN,
> +=C2=A0 =C2=A0 .valid =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 .min_access_size =3D 4,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 .max_access_size =3D 4,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 .unaligned =3D false

'false' is the default value, maybe we can omit it?

Sure, I'll remove it.
=C2=A0

> +=C2=A0 =C2=A0 },
> +=C2=A0 =C2=A0 .impl.min_access_size =3D 4,
> +};
> +
> +static void allwinner_h3_sid_reset(DeviceState *dev)
> +{
> +=C2=A0 =C2=A0 AwH3SidState *s =3D AW_H3_SID(dev);
> +
> +=C2=A0 =C2=A0 /* Set default values for registers */
> +=C2=A0 =C2=A0 s->control =3D 0;
> +=C2=A0 =C2=A0 s->rdkey =3D 0;
> +}
> +
> +static void allwinner_h3_sid_realize(DeviceState *dev, Error **errp)<= br> > +{
> +}

If you don't need realize(), just remove it. However maybe we want to <= br> check if the identifier is null, either warn/abort or generate a random one= ?
OK, removing it!
=C2=A0

> +
> +static void allwinner_h3_sid_init(Object *obj)
> +{
> +=C2=A0 =C2=A0 SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj);
> +=C2=A0 =C2=A0 AwH3SidState *s =3D AW_H3_SID(obj);
> +
> +=C2=A0 =C2=A0 /* Fill UUID with zeroes by default */
> +=C2=A0 =C2=A0 qemu_uuid_parse(UUID_NONE, &s->identifier);

AwH3SidState is zeroed just before this init() call. I think we don't <= br> need to zeroes the UUID again.

Ah OK, s= o you mean new objects are always zeroed. That makes it
much easi= er indeed. Thanks, I'll remove those lines.
=C2=A0
<= blockquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-l= eft:1px solid rgb(204,204,204);padding-left:1ex">
> +
> +=C2=A0 =C2=A0 /* Memory mapping */
> +=C2=A0 =C2=A0 memory_region_init_io(&s->iomem, OBJECT(s), &= ;allwinner_h3_sid_ops, s,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 TYPE_AW_H3_SID, 1 * KiB);
> +=C2=A0 =C2=A0 sysbus_init_mmio(sbd, &s->iomem);
> +}
> +
> +static Property allwinner_h3_sid_properties[] =3D {
> +=C2=A0 =C2=A0 DEFINE_PROP_UUID_NODEFAULT("identifier", AwH3= SidState, identifier),
> +=C2=A0 =C2=A0 DEFINE_PROP_END_OF_LIST()
> +};
> +
> +static const VMStateDescription allwinner_h3_sid_vmstate =3D {
> +=C2=A0 =C2=A0 .name =3D "allwinner-h3-sid",
> +=C2=A0 =C2=A0 .version_id =3D 1,
> +=C2=A0 =C2=A0 .minimum_version_id =3D 1,
> +=C2=A0 =C2=A0 .fields =3D (VMStateField[]) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 VMSTATE_UINT32(control, AwH3SidState), > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 VMSTATE_UINT32(rdkey, AwH3SidState),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 VMSTATE_END_OF_LIST()
> +=C2=A0 =C2=A0 }
> +};
> +
> +static void allwinner_h3_sid_class_init(ObjectClass *klass, void *dat= a)
> +{
> +=C2=A0 =C2=A0 DeviceClass *dc =3D DEVICE_CLASS(klass);
> +
> +=C2=A0 =C2=A0 dc->reset =3D allwinner_h3_sid_reset;
> +=C2=A0 =C2=A0 dc->realize =3D allwinner_h3_sid_realize;
> +=C2=A0 =C2=A0 dc->vmsd =3D &allwinner_h3_sid_vmstate;
> +=C2=A0 =C2=A0 dc->props =3D allwinner_h3_sid_properties;
> +}
> +
> +static const TypeInfo allwinner_h3_sid_info =3D {
> +=C2=A0 =C2=A0 .name=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TYPE_AW_H3_= SID,
> +=C2=A0 =C2=A0 .parent=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TYPE_SYS_BUS_DEV= ICE,
> +=C2=A0 =C2=A0 .instance_init =3D allwinner_h3_sid_init,
> +=C2=A0 =C2=A0 .instance_size =3D sizeof(AwH3SidState),
> +=C2=A0 =C2=A0 .class_init=C2=A0 =C2=A0 =3D allwinner_h3_sid_class_ini= t,
> +};
> +
> +static void allwinner_h3_sid_register(void)
> +{
> +=C2=A0 =C2=A0 type_register_static(&allwinner_h3_sid_info);
> +}
> +
> +type_init(allwinner_h3_sid_register)
> diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
> index c4ca2ed689..f3620eee4e 100644
> --- a/hw/misc/Makefile.objs
> +++ b/hw/misc/Makefile.objs
> @@ -31,6 +31,7 @@ common-obj-$(CONFIG_IVSHMEM_DEVICE) +=3D ivshmem.o >=C2=A0 =C2=A0common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-clk.o<= br> >=C2=A0 =C2=A0obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-cpucfg.o
>=C2=A0 =C2=A0common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-syscon= .o
> +common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-sid.o
>=C2=A0 =C2=A0common-obj-$(CONFIG_REALVIEW) +=3D arm_sysctl.o
>=C2=A0 =C2=A0common-obj-$(CONFIG_NSERIES) +=3D cbus.o
>=C2=A0 =C2=A0common-obj-$(CONFIG_ECCMEMCTL) +=3D eccmemctl.o
> diff --git a/hw/misc/trace-events b/hw/misc/trace-events
> index b93089d010..a777844ca3 100644
> --- a/hw/misc/trace-events
> +++ b/hw/misc/trace-events
> @@ -5,6 +5,10 @@ allwinner_h3_cpucfg_cpu_reset(uint8_t cpu_id, uint32_= t reset_addr) "H3-CPUCFG: c
>=C2=A0 =C2=A0allwinner_h3_cpucfg_read(uint64_t offset, uint64_t data, u= nsigned size) "H3-CPUCFG: read: offset 0x%" PRIx64 " data 0x= %" PRIx64 " size %" PRIu32
>=C2=A0 =C2=A0allwinner_h3_cpucfg_write(uint64_t offset, uint64_t data, = unsigned size) "H3-CPUCFG: write: offset 0x%" PRIx64 " data = 0x%" PRIx64 " size %" PRIu32
>=C2=A0 =C2=A0
> +# allwinner-h3-sid.c
> +allwinner_h3_sid_read(uint64_t offset, uint64_t data, unsigned size) = "H3-SID: read: offset 0x%" PRIx64 " data 0x%" PRIx64 &q= uot; size %" PRIu32
> +allwinner_h3_sid_write(uint64_t offset, uint64_t data, unsigned size)= "H3-SID: write: offset 0x%" PRIx64 " data 0x%" PRIx64 = " size %" PRIu32
> +
>=C2=A0 =C2=A0# eccmemctl.c
>=C2=A0 =C2=A0ecc_mem_writel_mer(uint32_t val) "Write memory enable= 0x%08x"
>=C2=A0 =C2=A0ecc_mem_writel_mdr(uint32_t val) "Write memory delay = 0x%08x"
>


Regards,
Niek
--
Ni= ek Linnenbank

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