Hi Gerd, On Tue, Dec 10, 2019 at 9:29 AM Gerd Hoffmann wrote: > On Tue, Dec 10, 2019 at 08:56:02AM +0100, Philippe Mathieu-Daudé wrote: > > On 12/2/19 10:09 PM, Niek Linnenbank wrote: > > > The Allwinner H3 System on Chip contains multiple USB 2.0 bus > > > connections which provide software access using the Enhanced > > > Host Controller Interface (EHCI) and Open Host Controller > > > Interface (OHCI) interfaces. This commit adds support for > > > both interfaces in the Allwinner H3 System on Chip. > > > > > > Signed-off-by: Niek Linnenbank > > > --- > > > hw/arm/allwinner-h3.c | 20 ++++++++++++++++++++ > > > hw/usb/hcd-ehci-sysbus.c | 17 +++++++++++++++++ > > > hw/usb/hcd-ehci.h | 1 + > > > > Cc'ing Gerd, the maintainer of these files. > > Looks all reasonable. > Reviewed-by: Gerd Hoffmann > > (assuming this will be merged through arm tree not usb). > Thanks for reviewing! I'll add the tag to the commit message. Regards, Niek > > > > > Reviewed-by: Philippe Mathieu-Daudé > > > > > 3 files changed, 38 insertions(+) > > > > > > diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c > > > index 5566e979ec..afeb49c0ac 100644 > > > --- a/hw/arm/allwinner-h3.c > > > +++ b/hw/arm/allwinner-h3.c > > > @@ -26,6 +26,7 @@ > > > #include "hw/sysbus.h" > > > #include "hw/arm/allwinner-h3.h" > > > #include "hw/misc/unimp.h" > > > +#include "hw/usb/hcd-ehci.h" > > > #include "sysemu/sysemu.h" > > > static void aw_h3_init(Object *obj) > > > @@ -183,6 +184,25 @@ static void aw_h3_realize(DeviceState *dev, Error > **errp) > > > } > > > sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, AW_H3_CCU_BASE); > > > + /* Universal Serial Bus */ > > > + sysbus_create_simple(TYPE_AW_H3_EHCI, AW_H3_EHCI0_BASE, > > > + s->irq[AW_H3_GIC_SPI_EHCI0]); > > > + sysbus_create_simple(TYPE_AW_H3_EHCI, AW_H3_EHCI1_BASE, > > > + s->irq[AW_H3_GIC_SPI_EHCI1]); > > > + sysbus_create_simple(TYPE_AW_H3_EHCI, AW_H3_EHCI2_BASE, > > > + s->irq[AW_H3_GIC_SPI_EHCI2]); > > > + sysbus_create_simple(TYPE_AW_H3_EHCI, AW_H3_EHCI3_BASE, > > > + s->irq[AW_H3_GIC_SPI_EHCI3]); > > > + > > > + sysbus_create_simple("sysbus-ohci", AW_H3_OHCI0_BASE, > > > + s->irq[AW_H3_GIC_SPI_OHCI0]); > > > + sysbus_create_simple("sysbus-ohci", AW_H3_OHCI1_BASE, > > > + s->irq[AW_H3_GIC_SPI_OHCI1]); > > > + sysbus_create_simple("sysbus-ohci", AW_H3_OHCI2_BASE, > > > + s->irq[AW_H3_GIC_SPI_OHCI2]); > > > + sysbus_create_simple("sysbus-ohci", AW_H3_OHCI3_BASE, > > > + s->irq[AW_H3_GIC_SPI_OHCI3]); > > > + > > > /* UART */ > > > if (serial_hd(0)) { > > > serial_mm_init(get_system_memory(), AW_H3_UART0_REG_BASE, 2, > > > diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c > > > index 020211fd10..174c3446ef 100644 > > > --- a/hw/usb/hcd-ehci-sysbus.c > > > +++ b/hw/usb/hcd-ehci-sysbus.c > > > @@ -145,6 +145,22 @@ static const TypeInfo ehci_exynos4210_type_info = > { > > > .class_init = ehci_exynos4210_class_init, > > > }; > > > +static void ehci_aw_h3_class_init(ObjectClass *oc, void *data) > > > +{ > > > + SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc); > > > + DeviceClass *dc = DEVICE_CLASS(oc); > > > + > > > + sec->capsbase = 0x0; > > > + sec->opregbase = 0x10; > > > + set_bit(DEVICE_CATEGORY_USB, dc->categories); > > > +} > > > + > > > +static const TypeInfo ehci_aw_h3_type_info = { > > > + .name = TYPE_AW_H3_EHCI, > > > + .parent = TYPE_SYS_BUS_EHCI, > > > + .class_init = ehci_aw_h3_class_init, > > > +}; > > > + > > > static void ehci_tegra2_class_init(ObjectClass *oc, void *data) > > > { > > > SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc); > > > @@ -267,6 +283,7 @@ static void ehci_sysbus_register_types(void) > > > type_register_static(&ehci_platform_type_info); > > > type_register_static(&ehci_xlnx_type_info); > > > type_register_static(&ehci_exynos4210_type_info); > > > + type_register_static(&ehci_aw_h3_type_info); > > > type_register_static(&ehci_tegra2_type_info); > > > type_register_static(&ehci_ppc4xx_type_info); > > > type_register_static(&ehci_fusbh200_type_info); > > > diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h > > > index 0298238f0b..edb59311c4 100644 > > > --- a/hw/usb/hcd-ehci.h > > > +++ b/hw/usb/hcd-ehci.h > > > @@ -342,6 +342,7 @@ typedef struct EHCIPCIState { > > > #define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb" > > > #define TYPE_PLATFORM_EHCI "platform-ehci-usb" > > > #define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb" > > > +#define TYPE_AW_H3_EHCI "aw-h3-ehci-usb" > > > #define TYPE_TEGRA2_EHCI "tegra2-ehci-usb" > > > #define TYPE_PPC4xx_EHCI "ppc4xx-ehci-usb" > > > #define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb" > > > > > > > -- Niek Linnenbank