Hello Philippe,

On Tue, Dec 3, 2019 at 10:02 AM Philippe Mathieu-Daudé <philmd@redhat.com>
wrote:

> On 12/2/19 10:09 PM, Niek Linnenbank wrote:
> > Dear QEMU developers,
> >
> > Hereby I would like to contribute the following set of patches to QEMU
> > which add support for the Allwinner H3 System on Chip and the
> > Orange Pi PC machine. The following features and devices are supported:
> >
> >   * SMP (Quad Core Cortex A7)
> >   * Generic Interrupt Controller configuration
> >   * SRAM mappings
> >   * Timer device (re-used from Allwinner A10)
> >   * UART
> >   * SD/MMC storage controller
> >   * EMAC ethernet connectivity
> >   * USB 2.0 interfaces
> >   * Clock Control Unit
> >   * System Control module
> >   * Security Identifier device
> >
> > Functionality related to graphical output such as HDMI, GPU,
> > Display Engine and audio are not included.
>
> I'd love to see the OpenRISC AR100 core instantiated in this SoC.
>
> Your contribution makes another good example of multi-arch/single-binary
> QEMU (here 4x ARM + 1x OpenRISC).
>
>
Indeed that sounds like an interesting combination. Are there plans to
build a multi-arch/single-binary QEMU?
I have not looked yet at that part of the H3, but there is some documention
available here on this wiki:
  https://linux-sunxi.org/AR100

Regards,
Niek

-- 
Niek Linnenbank

WWW: http://www.nieklinnenbank.nl/
BLOG: http://nieklinnenbank.wordpress.com/
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