From: Sai Pavan Boddu <saipava@xilinx.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Francisco Eduardo Iglesias" <figlesia@xilinx.com>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Vikram Garhwal" <fnuv@xilinx.com>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Markus Armbruster" <armbru@redhat.com>,
"Paul Zimmerman" <pauldzim@gmail.com>,
"Edgar Iglesias" <edgari@xilinx.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Ying Fang" <fangying1@huawei.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: RE: [PATCH v14 2/4] usb: Add DWC3 model
Date: Thu, 3 Dec 2020 17:57:58 +0000 [thread overview]
Message-ID: <CH2PR02MB677438760D2D38D5CD28CE67CAF20@CH2PR02MB6774.namprd02.prod.outlook.com> (raw)
In-Reply-To: <CAFEAcA_mLWxwXf6wWbLABOVeEz=bgTQhiV4B718Z4=vBGNi-4A@mail.gmail.com>
Hi Peter,
> -----Original Message-----
> From: Peter Maydell <peter.maydell@linaro.org>
> Sent: Tuesday, December 1, 2020 4:56 PM
> To: Sai Pavan Boddu <saipava@xilinx.com>
> Cc: Markus Armbruster <armbru@redhat.com>; Marc-André Lureau
> <marcandre.lureau@redhat.com>; Paolo Bonzini <pbonzini@redhat.com>;
> Gerd Hoffmann <kraxel@redhat.com>; Edgar Iglesias <edgari@xilinx.com>;
> Francisco Eduardo Iglesias <figlesia@xilinx.com>; Alistair Francis
> <alistair.francis@wdc.com>; Eduardo Habkost <ehabkost@redhat.com>; Ying
> Fang <fangying1@huawei.com>; Philippe Mathieu-Daudé
> <philmd@redhat.com>; Vikram Garhwal <fnuv@xilinx.com>; Paul Zimmerman
> <pauldzim@gmail.com>; Sai Pavan Boddu <saipava@xilinx.com>; QEMU
> Developers <qemu-devel@nongnu.org>
> Subject: Re: [PATCH v14 2/4] usb: Add DWC3 model
>
> On Tue, 1 Dec 2020 at 08:34, Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> wrote:
> >
> > From: Vikram Garhwal <fnu.vikram@xilinx.com>
> >
> > This patch adds skeleton model of dwc3 usb controller attached to
> > xhci-sysbus device. It defines global register space of DWC3
> > controller, global registers control the AXI/AHB interfaces
> > properties, external FIFO support and event count support. All of
> > which are unimplemented at present,we are only supporting core reset and
> read of ID register.
> >
> > Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com>
> > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> > Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
>
>
> > +typedef struct USBDWC3 {
> > + SysBusDevice parent_obj;
> > + MemoryRegion iomem;
> > + MemoryRegion fifos;
> > + XHCISysbusState sysbus_xhci;
> > +
> > + uint32_t regs[USB_DWC3_R_MAX];
> > + RegisterInfo regs_info[USB_DWC3_R_MAX];
>
> This device has state but is missing the VMState struct support for migration.
> Otherwise it looks OK.
[Sai Pavan Boddu] Ok, I will fix this in V15
Thanks,
Sai Pavan
>
> thanks
> -- PMM
next prev parent reply other threads:[~2020-12-03 18:00 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-01 8:38 [PATCH v14 0/4] Add Versal usb model Sai Pavan Boddu
2020-12-01 8:38 ` [PATCH v14 1/4] usb: Add versal-usb2-ctrl-regs module Sai Pavan Boddu
2020-12-01 11:23 ` Peter Maydell
2020-12-03 15:54 ` Sai Pavan Boddu
2020-12-01 8:38 ` [PATCH v14 2/4] usb: Add DWC3 model Sai Pavan Boddu
2020-12-01 11:25 ` Peter Maydell
2020-12-03 17:57 ` Sai Pavan Boddu [this message]
2020-12-01 8:38 ` [PATCH v14 3/4] usb: xlnx-usb-subsystem: Add xilinx usb subsystem Sai Pavan Boddu
2020-12-01 11:27 ` Peter Maydell
2020-12-03 17:58 ` Sai Pavan Boddu
2020-12-01 8:38 ` [PATCH v14 4/4] arm: xlnx-versal: Connect usb to virt-versal Sai Pavan Boddu
2020-12-01 11:34 ` Peter Maydell
2020-12-03 18:05 ` Edgar E. Iglesias
2020-12-03 19:16 ` Sai Pavan Boddu
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