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Fri, 27 Mar 2020 05:33:57 +0000 From: Bharat Bhushan To: Auger Eric , "peter.maydell@linaro.org" , "peterx@redhat.com" , "eric.auger.pro@gmail.com" , "alex.williamson@redhat.com" , "kevin.tian@intel.com" , "mst@redhat.com" , "Tomasz Nowicki [C]" , "drjones@redhat.com" , "linuc.decode@gmail.com" , "qemu-devel@nongnu.org" , "qemu-arm@nongnu.org" , "bharatb.linux@gmail.com" , "jean-philippe@linaro.org" , "yang.zhong@intel.com" Subject: RE: [EXT] Re: [PATCH v9 2/9] memory: Add interface to set iommu page size mask Thread-Topic: [EXT] Re: [PATCH v9 2/9] memory: Add interface to set iommu page size mask Thread-Index: AQHWAO+U287BbRFAv0SfWWGkXBLJyKhbDwUAgADe7fA= Date: Fri, 27 Mar 2020 05:33:57 +0000 Message-ID: References: <20200323084617.1782-1-bbhushan2@marvell.com> <20200323084617.1782-3-bbhushan2@marvell.com> <325b9322-54b9-e0ea-a67c-52fa91082173@redhat.com> In-Reply-To: <325b9322-54b9-e0ea-a67c-52fa91082173@redhat.com> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [122.182.231.48] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 992197a2-146d-4e2d-584e-08d7d210722c x-ms-traffictypediagnostic: MWHPR1801MB1839: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5236; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 992197a2-146d-4e2d-584e-08d7d210722c X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Mar 2020 05:33:57.1683 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iyBgSu36/wEmkXIl2b7pvA9RF54T9Id5hClBnvivFY9oqlfovPKvf1T1M3RzOAuwbjUogh9SD8hTJAAXTtgVqA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR1801MB1839 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.645 definitions=2020-03-26_14:2020-03-26, 2020-03-26 signatures=0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 67.231.148.174 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi Eric, > -----Original Message----- > From: Auger Eric > Sent: Thursday, March 26, 2020 9:36 PM > To: Bharat Bhushan ; peter.maydell@linaro.org; > peterx@redhat.com; eric.auger.pro@gmail.com; alex.williamson@redhat.com; > kevin.tian@intel.com; mst@redhat.com; Tomasz Nowicki [C] > ; drjones@redhat.com; linuc.decode@gmail.com; qemu- > devel@nongnu.org; qemu-arm@nongnu.org; bharatb.linux@gmail.com; jean- > philippe@linaro.org; yang.zhong@intel.com > Subject: [EXT] Re: [PATCH v9 2/9] memory: Add interface to set iommu page= size > mask >=20 > External Email >=20 > ---------------------------------------------------------------------- > Hi Bharat, > On 3/23/20 9:46 AM, Bharat Bhushan wrote: > > Allow to set page size mask to be supported by iommu. > by iommu memory region. I mean this is not global to the IOMMU. Yes. > > This is required to expose page size mask compatible with host with > > virtio-iommu. > > > > Signed-off-by: Bharat Bhushan > > --- > > include/exec/memory.h | 20 ++++++++++++++++++++ > > memory.c | 10 ++++++++++ > > 2 files changed, 30 insertions(+) > > > > diff --git a/include/exec/memory.h b/include/exec/memory.h index > > e85b7de99a..063c424854 100644 > > --- a/include/exec/memory.h > > +++ b/include/exec/memory.h > > @@ -355,6 +355,16 @@ typedef struct IOMMUMemoryRegionClass { > > * @iommu: the IOMMUMemoryRegion > > */ > > int (*num_indexes)(IOMMUMemoryRegion *iommu); > > + > > + /* > > + * Set supported IOMMU page size > > + * > > + * Optional method: if this is supported then set page size that > > + * can be supported by IOMMU. This is called to set supported page > > + * size as per host Linux. > What about: If supported, allows to restrict the page size mask that can = be > supported with a given IOMMU memory region. For example, this allows to > propagate host physical IOMMU page size mask limitations to the virtual I= OMMU > (vfio assignment with virtual iommu). Much better=20 > > + */ > > + void (*iommu_set_page_size_mask)(IOMMUMemoryRegion *iommu, > > + uint64_t page_size_mask); > > } IOMMUMemoryRegionClass; > > > > typedef struct CoalescedMemoryRange CoalescedMemoryRange; @@ -1363,6 > > +1373,16 @@ int > memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr, > > */ > > int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr); > > > > +/** > > + * memory_region_iommu_set_page_size_mask: set the supported pages > > + * size by iommu. > supported page sizes for a given IOMMU memory region > > + * > > + * @iommu_mr: the memory region > IOMMU memory region > > + * @page_size_mask: supported page size mask */ void > > +memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion > *iommu_mr, > > + uint64_t page_size_mask); > > + > > /** > > * memory_region_name: get a memory region's name > > * > > diff --git a/memory.c b/memory.c > > index aeaa8dcc9e..14c8783084 100644 > > --- a/memory.c > > +++ b/memory.c > > @@ -1833,6 +1833,16 @@ static int > memory_region_update_iommu_notify_flags(IOMMUMemoryRegion > *iommu_mr, > > return ret; > > } > > > > +void memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion > *iommu_mr, > > + uint64_t page_size_mask) > > +{ > > + IOMMUMemoryRegionClass *imrc =3D > > +IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); > > + > > + if (imrc->iommu_set_page_size_mask) { > > + imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask); > Shouldn't it return an int in case the setting cannot be applied? iommu_set_page_size_mask() is setting page-size-mask for endpoint. Below fu= nction from code static void virtio_iommu_set_page_size_mask(IOMMUMemoryRegion *mr, uint64_t page_size_mask) { IOMMUDevice *sdev =3D container_of(mr, IOMMUDevice, iommu_mr); sdev->page_size_mask =3D page_size_mask; } Do you see any reason it cannot be applied, am I missing something? Thanks -Bharat > > + } > > +} > > + > > int memory_region_register_iommu_notifier(MemoryRegion *mr, > > IOMMUNotifier *n, Error > > **errp) { > > > Thanks > Eric