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Mon, 22 Feb 2021 15:43:10 -0500 (EST) Date: Mon, 22 Feb 2021 21:43:09 +0100 From: Klaus Jensen To: Minwoo Im Subject: Re: [PATCH V2 6/7] hw/block/nvme: support namespace attachment command Message-ID: References: <20210210160937.1100-1-minwoo.im.dev@gmail.com> <20210210160937.1100-7-minwoo.im.dev@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="8gxjdZN77zr+t62i" Content-Disposition: inline In-Reply-To: <20210210160937.1100-7-minwoo.im.dev@gmail.com> Received-SPF: pass client-ip=66.111.4.29; envelope-from=its@irrelevant.dk; helo=out5-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Keith Busch , Kevin Wolf , qemu-devel@nongnu.org, qemu-block@nongnu.org, Max Reitz Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --8gxjdZN77zr+t62i Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Feb 11 01:09, Minwoo Im wrote: > This patch supports Namespace Attachment command for the pre-defined > nvme-ns device nodes. Of course, attach/detach namespace should only be > supported in case 'subsys' is given. This is because if we detach a > namespace from a controller, somebody needs to manage the detached, but > allocated namespace in the NVMe subsystem. >=20 > Signed-off-by: Minwoo Im > --- > hw/block/nvme-subsys.h | 10 +++++++ > hw/block/nvme.c | 59 ++++++++++++++++++++++++++++++++++++++++++ > hw/block/nvme.h | 5 ++++ > hw/block/trace-events | 2 ++ > include/block/nvme.h | 5 ++++ > 5 files changed, 81 insertions(+) >=20 > diff --git a/hw/block/nvme-subsys.h b/hw/block/nvme-subsys.h > index 14627f9ccb41..ef4bec928eae 100644 > --- a/hw/block/nvme-subsys.h > +++ b/hw/block/nvme-subsys.h > @@ -30,6 +30,16 @@ typedef struct NvmeSubsystem { > int nvme_subsys_register_ctrl(NvmeCtrl *n, Error **errp); > int nvme_subsys_register_ns(NvmeNamespace *ns, Error **errp); > =20 > +static inline NvmeCtrl *nvme_subsys_ctrl(NvmeSubsystem *subsys, > + uint32_t cntlid) > +{ > + if (!subsys) { > + return NULL; > + } > + > + return subsys->ctrls[cntlid]; > +} > + > /* > * Return allocated namespace of the specified nsid in the subsystem. > */ > diff --git a/hw/block/nvme.c b/hw/block/nvme.c > index 697368a6ae0c..71bcd66f1956 100644 > --- a/hw/block/nvme.c > +++ b/hw/block/nvme.c > @@ -183,6 +183,7 @@ static const uint32_t nvme_cse_acs[256] =3D { > [NVME_ADM_CMD_SET_FEATURES] =3D NVME_CMD_EFF_CSUPP, > [NVME_ADM_CMD_GET_FEATURES] =3D NVME_CMD_EFF_CSUPP, > [NVME_ADM_CMD_ASYNC_EV_REQ] =3D NVME_CMD_EFF_CSUPP, > + [NVME_ADM_CMD_NS_ATTACHMENT] =3D NVME_CMD_EFF_CSUPP, > }; > =20 > static const uint32_t nvme_cse_iocs_none[256]; > @@ -3766,6 +3767,62 @@ static uint16_t nvme_aer(NvmeCtrl *n, NvmeRequest = *req) > return NVME_NO_COMPLETE; > } > =20 > +static void __nvme_select_ns_iocs(NvmeCtrl *n, NvmeNamespace *ns); > +static uint16_t nvme_ns_attachment(NvmeCtrl *n, NvmeRequest *req) > +{ > + NvmeNamespace *ns; > + NvmeCtrl *ctrl; > + uint16_t list[NVME_CONTROLLER_LIST_SIZE] =3D {}; > + uint32_t nsid =3D le32_to_cpu(req->cmd.nsid); > + uint32_t dw10 =3D le32_to_cpu(req->cmd.cdw10); > + bool attach =3D !(dw10 & 0xf); > + uint16_t *nr_ids =3D &list[0]; > + uint16_t *ids =3D &list[1]; > + uint16_t ret; > + int i; > + > + trace_pci_nvme_ns_attachment(nvme_cid(req), dw10 & 0xf); > + > + ns =3D nvme_subsys_ns(n->subsys, nsid); > + if (!ns) { > + return NVME_INVALID_FIELD | NVME_DNR; > + } > + > + ret =3D nvme_dma(n, (uint8_t *)list, 4096, > + DMA_DIRECTION_TO_DEVICE, req); > + if (ret) { > + return ret; > + } > + > + if (!*nr_ids) { > + return NVME_NS_CTRL_LIST_INVALID | NVME_DNR; > + } > + > + for (i =3D 0; i < *nr_ids; i++) { > + ctrl =3D nvme_subsys_ctrl(n->subsys, ids[i]); > + if (!ctrl) { > + return NVME_NS_CTRL_LIST_INVALID | NVME_DNR; > + } > + > + if (attach) { > + if (nvme_ns_is_attached(ctrl, ns)) { > + return NVME_NS_ALREADY_ATTACHED | NVME_DNR; > + } > + > + nvme_ns_attach(ctrl, ns); > + __nvme_select_ns_iocs(ctrl, ns); > + } else { > + if (!nvme_ns_is_attached(ctrl, ns)) { > + return NVME_NS_NOT_ATTACHED | NVME_DNR; > + } > + > + nvme_ns_detach(ctrl, ns); > + } > + } > + > + return NVME_SUCCESS; > +} > + > static uint16_t nvme_admin_cmd(NvmeCtrl *n, NvmeRequest *req) > { > trace_pci_nvme_admin_cmd(nvme_cid(req), nvme_sqid(req), req->cmd.opc= ode, > @@ -3797,6 +3854,8 @@ static uint16_t nvme_admin_cmd(NvmeCtrl *n, NvmeReq= uest *req) > return nvme_get_feature(n, req); > case NVME_ADM_CMD_ASYNC_EV_REQ: > return nvme_aer(n, req); > + case NVME_ADM_CMD_NS_ATTACHMENT: > + return nvme_ns_attachment(n, req); > default: > assert(false); > } > diff --git a/hw/block/nvme.h b/hw/block/nvme.h > index 1c7796b20996..5a1ab857d166 100644 > --- a/hw/block/nvme.h > +++ b/hw/block/nvme.h > @@ -222,6 +222,11 @@ static inline void nvme_ns_attach(NvmeCtrl *n, NvmeN= amespace *ns) > n->namespaces[nvme_nsid(ns) - 1] =3D ns; > } > =20 > +static inline void nvme_ns_detach(NvmeCtrl *n, NvmeNamespace *ns) > +{ > + n->namespaces[nvme_nsid(ns) - 1] =3D NULL; > +} > + > static inline NvmeCQueue *nvme_cq(NvmeRequest *req) > { > NvmeSQueue *sq =3D req->sq; > diff --git a/hw/block/trace-events b/hw/block/trace-events > index b6e972d733a6..bf67fe7873d2 100644 > --- a/hw/block/trace-events > +++ b/hw/block/trace-events > @@ -80,6 +80,8 @@ pci_nvme_aer(uint16_t cid) "cid %"PRIu16"" > pci_nvme_aer_aerl_exceeded(void) "aerl exceeded" > pci_nvme_aer_masked(uint8_t type, uint8_t mask) "type 0x%"PRIx8" mask 0x= %"PRIx8"" > pci_nvme_aer_post_cqe(uint8_t typ, uint8_t info, uint8_t log_page) "type= 0x%"PRIx8" info 0x%"PRIx8" lid 0x%"PRIx8"" > +pci_nvme_ns_attachment(uint16_t cid, uint8_t sel) "cid %"PRIu16", sel=3D= 0x%"PRIx8"" > +pci_nvme_ns_attachment_attach(uint16_t cntlid, uint32_t nsid) "cntlid=3D= 0x%"PRIx16", nsid=3D0x%"PRIx32"" > pci_nvme_enqueue_event(uint8_t typ, uint8_t info, uint8_t log_page) "typ= e 0x%"PRIx8" info 0x%"PRIx8" lid 0x%"PRIx8"" > pci_nvme_enqueue_event_noqueue(int queued) "queued %d" > pci_nvme_enqueue_event_masked(uint8_t typ) "type 0x%"PRIx8"" > diff --git a/include/block/nvme.h b/include/block/nvme.h > index f82b5ffc2c1d..4b016f954fee 100644 > --- a/include/block/nvme.h > +++ b/include/block/nvme.h > @@ -566,6 +566,7 @@ enum NvmeAdminCommands { > NVME_ADM_CMD_ASYNC_EV_REQ =3D 0x0c, > NVME_ADM_CMD_ACTIVATE_FW =3D 0x10, > NVME_ADM_CMD_DOWNLOAD_FW =3D 0x11, > + NVME_ADM_CMD_NS_ATTACHMENT =3D 0x15, > NVME_ADM_CMD_FORMAT_NVM =3D 0x80, > NVME_ADM_CMD_SECURITY_SEND =3D 0x81, > NVME_ADM_CMD_SECURITY_RECV =3D 0x82, > @@ -836,6 +837,9 @@ enum NvmeStatusCodes { > NVME_FEAT_NOT_CHANGEABLE =3D 0x010e, > NVME_FEAT_NOT_NS_SPEC =3D 0x010f, > NVME_FW_REQ_SUSYSTEM_RESET =3D 0x0110, > + NVME_NS_ALREADY_ATTACHED =3D 0x0118, > + NVME_NS_NOT_ATTACHED =3D 0x011A, > + NVME_NS_CTRL_LIST_INVALID =3D 0x011C, > NVME_CONFLICTING_ATTRS =3D 0x0180, > NVME_INVALID_PROT_INFO =3D 0x0181, > NVME_WRITE_TO_RO =3D 0x0182, > @@ -951,6 +955,7 @@ typedef struct QEMU_PACKED NvmePSD { > uint8_t resv[16]; > } NvmePSD; > =20 > +#define NVME_CONTROLLER_LIST_SIZE 2048 > #define NVME_IDENTIFY_DATA_SIZE 4096 > =20 I know that I'm the one to blame for NVME_IDENTIFY_DATA_SIZE being there, but it really doesn't belong in the shared header. This can be fixed up when merged. > enum NvmeIdCns { > --=20 > 2.17.1 >=20 >=20 --8gxjdZN77zr+t62i Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmA0F1sACgkQTeGvMW1P DekbyAf/acfC525zcehgqNxrAYvfugioYSJQ3xZa5Yu1ErOi85us0ZjnVKVu6xdy 4ZsB4WIRTIo0ZQiH8Lqb4uP7zonQVjba9+AfmBWzc3E2vm9F3bOXAh5u3sneZOIb ZAA4yK7PkypwmNEkiSM3NhJgI1IIJY0X6X9QHi3LTJ+AOmk/fRPUiaZOX8mKKK0z KhdW5wMg+0U3p+Cv3DSyidpi2CEfg6+7ATjPap+zdBtcnBHc2KOSzuzzRspUTT8S frsvyEWPc5yOYdqlLQAEBNjwu3+KWehHr1g9wxD9zi7QdSMI3PHo+pGkTvphupd9 3yc9m0CJgM1bvtikoOOtmgqv0TuP+g== =5RBQ -----END PGP SIGNATURE----- --8gxjdZN77zr+t62i--