From: David Gibson <david@gibson.dropbear.id.au>
To: Fabiano Rosas <farosas@linux.ibm.com>
Cc: "Cédric Le Goater" <clg@fr.ibm.com>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
"Nicholas Piggin" <npiggin@gmail.com>
Subject: Re: [PATCH v2 1/4] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour
Date: Fri, 16 Apr 2021 14:13:05 +1000 [thread overview]
Message-ID: <YHkO0eyB3XkJ9TGo@yekko.fritz.box> (raw)
In-Reply-To: <87k0p3zqze.fsf@linux.ibm.com>
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On Thu, Apr 15, 2021 at 09:12:21AM -0300, Fabiano Rosas wrote:
> Nicholas Piggin <npiggin@gmail.com> writes:
>
> > ISA v3.0 radix guest execution has a quirk in AIL behaviour such that
> > the LPCR[AIL] value can apply to hypervisor interrupts.
> >
> > This affects machines that emulate HV=1 mode (i.e., powernv9).
> >
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>
> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Applied to ppc-for-6.1.
>
> > ---
> > target/ppc/excp_helper.c | 17 +++++++++++++----
> > 1 file changed, 13 insertions(+), 4 deletions(-)
> >
> > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> > index 85de7e6c90..b8881c0f85 100644
> > --- a/target/ppc/excp_helper.c
> > +++ b/target/ppc/excp_helper.c
> > @@ -791,14 +791,23 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
> > #endif
> >
> > /*
> > - * AIL only works if there is no HV transition and we are running
> > - * with translations enabled
> > + * AIL only works if MSR[IR] and MSR[DR] are both enabled.
> > */
> > - if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1) ||
> > - ((new_msr & MSR_HVB) && !(msr & MSR_HVB))) {
> > + if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1)) {
> > ail = 0;
> > }
> >
> > + /*
> > + * AIL does not work if there is a MSR[HV] 0->1 transition and the
> > + * partition is in HPT mode. For radix guests, such interrupts are
> > + * allowed to be delivered to the hypervisor in ail mode.
> > + */
> > + if ((new_msr & MSR_HVB) && !(msr & MSR_HVB)) {
> > + if (!(env->spr[SPR_LPCR] & LPCR_HR)) {
> > + ail = 0;
> > + }
> > + }
> > +
> > vector = env->excp_vectors[excp];
> > if (vector == (target_ulong)-1ULL) {
> > cpu_abort(cs, "Raised an exception without defined vector %d\n",
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2021-04-16 4:30 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-15 5:42 [PATCH v2 0/4] ppc: rework AIL logic, add POWER10 exception model Nicholas Piggin
2021-04-15 5:42 ` [PATCH v2 1/4] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour Nicholas Piggin
2021-04-15 12:12 ` Fabiano Rosas
2021-04-16 4:13 ` David Gibson [this message]
2021-04-15 5:42 ` [PATCH v2 2/4] target/ppc: POWER10 supports scv Nicholas Piggin
2021-04-15 7:43 ` [EXTERNAL] " Cédric Le Goater
2021-04-16 4:15 ` David Gibson
2021-04-15 5:42 ` [PATCH v2 3/4] target/ppc: Rework AIL logic in interrupt delivery Nicholas Piggin
2021-04-16 4:24 ` David Gibson
2021-04-17 3:17 ` Nicholas Piggin
2021-04-15 5:42 ` [PATCH v2 4/4] target/ppc: Add POWER10 exception model Nicholas Piggin
2021-04-16 4:28 ` David Gibson
2021-04-17 3:31 ` Nicholas Piggin
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