On Fri, Apr 30, 2021 at 04:35:31PM -0300, Bruno Larsen (billionai) wrote: > Since vscr is not an spr, its initialization was removed from the > spr registration functions, and moved to the relevant init_procs. > > We may look into adding vscr to the reset path instead of the init > path (as suggested by David Gibson), but this looked like a good > enough solution for now. > > Signed-off-by: Bruno Larsen (billionai) > Applied to ppc-for-6.1, thanks. > --- > target/ppc/translate_init.c.inc | 20 +++++++++++++------- > 1 file changed, 13 insertions(+), 7 deletions(-) > > diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc > index 67529e8648..b922b04f25 100644 > --- a/target/ppc/translate_init.c.inc > +++ b/target/ppc/translate_init.c.inc > @@ -941,8 +941,6 @@ static void gen_spr_74xx(CPUPPCState *env) > SPR_NOACCESS, SPR_NOACCESS, > &spr_read_generic, spr_access_nop, > 0x00000000); > - /* Not strictly an SPR */ > - vscr_init(env, 0x00010000); > } > > static void gen_l3_ctrl(CPUPPCState *env) > @@ -5790,6 +5788,7 @@ static void init_proc_7400(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* XXX : not implemented */ > spr_register(env, SPR_UBAMR, "UBAMR", > &spr_read_ureg, SPR_NOACCESS, > @@ -5869,6 +5868,7 @@ static void init_proc_7410(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* XXX : not implemented */ > spr_register(env, SPR_UBAMR, "UBAMR", > &spr_read_ureg, SPR_NOACCESS, > @@ -5954,6 +5954,7 @@ static void init_proc_7440(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* XXX : not implemented */ > spr_register(env, SPR_UBAMR, "UBAMR", > &spr_read_ureg, SPR_NOACCESS, > @@ -6062,6 +6063,7 @@ static void init_proc_7450(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* Level 3 cache control */ > gen_l3_ctrl(env); > /* L3ITCR1 */ > @@ -6196,6 +6198,7 @@ static void init_proc_7445(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* LDSTCR */ > /* XXX : not implemented */ > spr_register(env, SPR_LDSTCR, "LDSTCR", > @@ -6333,6 +6336,7 @@ static void init_proc_7455(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* Level 3 cache control */ > gen_l3_ctrl(env); > /* LDSTCR */ > @@ -6472,6 +6476,7 @@ static void init_proc_7457(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* Level 3 cache control */ > gen_l3_ctrl(env); > /* L3ITCR1 */ > @@ -6635,6 +6640,7 @@ static void init_proc_e600(CPUPPCState *env) > gen_tbl(env); > /* 74xx specific SPR */ > gen_spr_74xx(env); > + vscr_init(env, 0x00010000); > /* XXX : not implemented */ > spr_register(env, SPR_UBAMR, "UBAMR", > &spr_read_ureg, SPR_NOACCESS, > @@ -6833,11 +6839,6 @@ static void gen_spr_book3s_altivec(CPUPPCState *env) > &spr_read_generic, &spr_write_generic, > KVM_REG_PPC_VRSAVE, 0x00000000); > > - /* > - * Can't find information on what this should be on reset. This > - * value is the one used by 74xx processors. > - */ > - vscr_init(env, 0x00010000); > } > > static void gen_spr_book3s_dbg(CPUPPCState *env) > @@ -7457,6 +7458,11 @@ static void init_proc_book3s_common(CPUPPCState *env) > gen_spr_book3s_pmu_sup(env); > gen_spr_book3s_pmu_user(env); > gen_spr_book3s_ctrl(env); > + /* > + * Can't find information on what this should be on reset. This > + * value is the one used by 74xx processors. > + */ > + vscr_init(env, 0x00010000); > } > > static void init_proc_970(CPUPPCState *env) -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson