From: "Cédric Le Goater" <clg@kaod.org>
To: Greg Kurz <groug@kaod.org>, David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 09/13] ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom()
Date: Fri, 13 Dec 2019 14:03:14 +0100 [thread overview]
Message-ID: <b93304e0-8b51-cc69-e224-8c2c446e231c@kaod.org> (raw)
In-Reply-To: <157623841868.360005.17577624823547136435.stgit@bahia.lan>
On 13/12/2019 13:00, Greg Kurz wrote:
> Since pnv_dt_xscom() is called from chip specific dt_populate() hooks,
> it shouldn't have to guess the chip type in order to populate the "reg"
> property. Just pass the base address and address size as arguments.
Much better,
> Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---
> hw/ppc/pnv.c | 12 +++++++++---
> hw/ppc/pnv_xscom.c | 16 +++-------------
> include/hw/ppc/pnv_xscom.h | 3 ++-
> 3 files changed, 14 insertions(+), 17 deletions(-)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 88efa755e611..c532e98e752a 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -282,7 +282,9 @@ static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt)
> {
> int i;
>
> - pnv_dt_xscom(chip, fdt, 0);
> + pnv_dt_xscom(chip, fdt, 0,
> + cpu_to_be64(PNV_XSCOM_BASE(chip)),
> + cpu_to_be64(PNV_XSCOM_SIZE));
>
> for (i = 0; i < chip->nr_cores; i++) {
> PnvCore *pnv_core = chip->cores[i];
> @@ -302,7 +304,9 @@ static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt)
> {
> int i;
>
> - pnv_dt_xscom(chip, fdt, 0);
> + pnv_dt_xscom(chip, fdt, 0,
> + cpu_to_be64(PNV9_XSCOM_BASE(chip)),
> + cpu_to_be64(PNV9_XSCOM_SIZE));
>
> for (i = 0; i < chip->nr_cores; i++) {
> PnvCore *pnv_core = chip->cores[i];
> @@ -321,7 +325,9 @@ static void pnv_chip_power10_dt_populate(PnvChip *chip, void *fdt)
> {
> int i;
>
> - pnv_dt_xscom(chip, fdt, 0);
> + pnv_dt_xscom(chip, fdt, 0,
> + cpu_to_be64(PNV10_XSCOM_BASE(chip)),
> + cpu_to_be64(PNV10_XSCOM_SIZE));
>
> for (i = 0; i < chip->nr_cores; i++) {
> PnvCore *pnv_core = chip->cores[i];
> diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> index df926003f2ba..8189767eb0bb 100644
> --- a/hw/ppc/pnv_xscom.c
> +++ b/hw/ppc/pnv_xscom.c
> @@ -286,24 +286,14 @@ static const char compat_p8[] = "ibm,power8-xscom\0ibm,xscom";
> static const char compat_p9[] = "ibm,power9-xscom\0ibm,xscom";
> static const char compat_p10[] = "ibm,power10-xscom\0ibm,xscom";
>
> -int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset)
> +int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset,
> + uint64_t xscom_base, uint64_t xscom_size)
> {
> - uint64_t reg[2];
> + uint64_t reg[] = { xscom_base, xscom_size };
> int xscom_offset;
> ForeachPopulateArgs args;
> char *name;
>
> - if (pnv_chip_is_power10(chip)) {
> - reg[0] = cpu_to_be64(PNV10_XSCOM_BASE(chip));
> - reg[1] = cpu_to_be64(PNV10_XSCOM_SIZE);
> - } else if (pnv_chip_is_power9(chip)) {
> - reg[0] = cpu_to_be64(PNV9_XSCOM_BASE(chip));
> - reg[1] = cpu_to_be64(PNV9_XSCOM_SIZE);
> - } else {
> - reg[0] = cpu_to_be64(PNV_XSCOM_BASE(chip));
> - reg[1] = cpu_to_be64(PNV_XSCOM_SIZE);
> - }
> -
> name = g_strdup_printf("xscom@%" PRIx64, be64_to_cpu(reg[0]));
> xscom_offset = fdt_add_subnode(fdt, root_offset, name);
> _FDT(xscom_offset);
> diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
> index 2bdb7ae84fd3..ad53f788b44c 100644
> --- a/include/hw/ppc/pnv_xscom.h
> +++ b/include/hw/ppc/pnv_xscom.h
> @@ -114,7 +114,8 @@ typedef struct PnvXScomInterfaceClass {
> #define PNV10_XSCOM_PSIHB_SIZE 0x100
>
> void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
> -int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset);
> +int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset,
> + uint64_t xscom_base, uint64_t xscom_size);
>
> void pnv_xscom_add_subregion(PnvChip *chip, hwaddr offset,
> MemoryRegion *mr);
>
next prev parent reply other threads:[~2019-12-13 21:27 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-13 11:59 [PATCH 00/13] ppc/pnv: Get rid of chip_type attributes Greg Kurz
2019-12-13 11:59 ` [PATCH 01/13] ppc: Drop useless extern annotation for functions Greg Kurz
2019-12-13 11:59 ` [PATCH 02/13] ppc/pnv: Introduce PnvPsiClass::compat Greg Kurz
2019-12-13 12:42 ` Cédric Le Goater
2019-12-13 11:59 ` [PATCH 03/13] ppc/pnv: Drop PnvPsiClass::chip_type Greg Kurz
2019-12-13 12:43 ` Cédric Le Goater
2019-12-13 11:59 ` [PATCH 04/13] ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compat Greg Kurz
2019-12-13 12:44 ` Cédric Le Goater
2019-12-16 18:07 ` Greg Kurz
2019-12-17 0:00 ` David Gibson
2019-12-13 11:59 ` [PATCH 05/13] ppc/pnv: Introduce PnvMachineClass::dt_power_mgt() Greg Kurz
2019-12-13 12:44 ` Cédric Le Goater
2019-12-13 12:00 ` [PATCH 06/13] ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpers Greg Kurz
2019-12-13 12:59 ` Cédric Le Goater
2019-12-13 12:00 ` [PATCH 07/13] ppc/pnv: Introduce PnvChipClass::intc_print_info() method Greg Kurz
2019-12-13 13:00 ` Cédric Le Goater
2019-12-16 1:28 ` David Gibson
2019-12-16 7:54 ` Cédric Le Goater
2019-12-13 12:00 ` [PATCH 08/13] ppc/pnv: Introduce PnvChipClass::xscom_core_base() method Greg Kurz
2019-12-13 13:01 ` Cédric Le Goater
2019-12-13 12:00 ` [PATCH 09/13] ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom() Greg Kurz
2019-12-13 13:03 ` Cédric Le Goater [this message]
2019-12-13 12:00 ` [PATCH 10/13] ppc/pnv: Pass content of the "compatible" property " Greg Kurz
2019-12-13 13:03 ` Cédric Le Goater
2019-12-13 12:00 ` [PATCH 11/13] ppc/pnv: Drop pnv_chip_is_power9() and pnv_chip_is_power10() helpers Greg Kurz
2019-12-13 13:05 ` Cédric Le Goater
2019-12-13 12:00 ` [PATCH 12/13] ppc/pnv: Introduce PnvChipClass::xscom_pcba() method Greg Kurz
2019-12-13 13:06 ` Cédric Le Goater
2019-12-16 1:32 ` David Gibson
2019-12-13 12:00 ` [PATCH 13/13] ppc/pnv: Drop PnvChipClass::type Greg Kurz
2019-12-13 13:06 ` Cédric Le Goater
2019-12-16 1:34 ` [PATCH 00/13] ppc/pnv: Get rid of chip_type attributes David Gibson
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