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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id n11sm87191wmi.10.2020.03.30.09.22.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 Mar 2020 09:22:44 -0700 (PDT) Subject: Re: [PATCH for-5.0, v1] target/mips: Fix loongson multimedia condition instructions To: Jiaxun Yang , qemu-devel@nongnu.org References: <20200324122212.11156-1-jiaxun.yang@flygoat.com> <39c28108-5d85-d611-c2ea-abbbf913b981@redhat.com> <1B369970-E78B-4A05-A80E-D7AB527E3A4E@flygoat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Mon, 30 Mar 2020 18:22:43 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <1B369970-E78B-4A05-A80E-D7AB527E3A4E@flygoat.com> Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 63.128.21.74 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Huacai Chen , aleksandar.qemu.devel@gmail.com, richard.henderson@linaro.org, aleksandar.rikalo@rt-rk.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/30/20 6:18 PM, Jiaxun Yang wrote: >=20 >=20 > =E4=BA=8E 2020=E5=B9=B43=E6=9C=8830=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=88= 11:39:44, "Philippe Mathieu-Daud=C3=A9" =E5=86=99=E5=88= =B0: >> Hi Jiaxun Yang, >> >> On 3/24/20 1:22 PM, Jiaxun Yang wrote: >>> Loongson multimedia condition instructions were previously >> implemented as >>> write 0 to rd due to lack of documentation. So I just confirmed with >> Loongson >>> about their encoding and implemented them correctly. >> >> If you have a binary using loongson multimedia instructions, can you >> add >> a test? So this code won't bitrot. >=20 > I know ffmpeg uses it. > But I think that's too fat. Looks perfect to me! It'll be simpler if you use a pre-build binary from a known distribution. >=20 >> >> I'm in particular interested by a test covering the MAC2008 >> instructions. You can look at examples in the tests/tcg/mips/ >> directory, >> Aleksandar added a lot of tests there. >=20 > I'm going to try that. >=20 > Thanks. >=20 >> >> Thanks, >> >> Phil. >> >>> >>> Signed-off-by: Jiaxun Yang >>> Acked-by: Huacai Chen >>> --- >>> v1: Use deposit opreations according to Richard's suggestion. >>> --- >>> target/mips/translate.c | 35 +++++++++++++++++++++++++++++++---- >>> 1 file changed, 31 insertions(+), 4 deletions(-) >>> >>> diff --git a/target/mips/translate.c b/target/mips/translate.c >>> index d745bd2803..25b595a17d 100644 >>> --- a/target/mips/translate.c >>> +++ b/target/mips/translate.c >>> @@ -5529,6 +5529,7 @@ static void >> gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) >>> { >>> uint32_t opc, shift_max; >>> TCGv_i64 t0, t1; >>> + TCGCond cond; >>> =20 >>> opc =3D MASK_LMI(ctx->opcode); >>> switch (opc) { >>> @@ -5862,14 +5863,39 @@ static void >> gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) >>> =20 >>> case OPC_SEQU_CP2: >>> case OPC_SEQ_CP2: >>> + cond =3D TCG_COND_EQ; >>> + goto do_cc_cond; >>> + break; >>> case OPC_SLTU_CP2: >>> + cond =3D TCG_COND_LTU; >>> + goto do_cc_cond; >>> + break; >>> case OPC_SLT_CP2: >>> + cond =3D TCG_COND_LT; >>> + goto do_cc_cond; >>> + break; >>> case OPC_SLEU_CP2: >>> + cond =3D TCG_COND_LEU; >>> + goto do_cc_cond; >>> + break; >>> case OPC_SLE_CP2: >>> - /* >>> - * ??? Document is unclear: Set FCC[CC]. Does that mean the >>> - * FD field is the CC field? >>> - */ >>> + cond =3D TCG_COND_LE; >>> + do_cc_cond: >>> + { >>> + int cc =3D (ctx->opcode >> 8) & 0x7; >>> + TCGv_i64 t64 =3D tcg_temp_new_i64(); >>> + TCGv_i32 t32 =3D tcg_temp_new_i32(); >>> + >>> + tcg_gen_setcond_i64(cond, t64, t0, t1); >>> + tcg_gen_extrl_i64_i32(t32, t64); >>> + tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32, >>> + get_fp_bit(cc), 1); >>> + >>> + tcg_temp_free_i32(t32); >>> + tcg_temp_free_i64(t64); >>> + } >>> + goto no_rd; >>> + break; >>> default: >>> MIPS_INVAL("loongson_cp2"); >>> generate_exception_end(ctx, EXCP_RI); >>> @@ -5878,6 +5904,7 @@ static void >> gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) >>> =20 >>> gen_store_fpr64(ctx, t0, rd); >>> =20 >>> +no_rd: >>> tcg_temp_free_i64(t0); >>> tcg_temp_free_i64(t1); >>> } >>> >=20