From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: Finn Thain <fthain@linux-m68k.org>,
David Gibson <david@gibson.dropbear.id.au>,
Greg Kurz <groug@kaod.org>
Cc: qemu-ppc@nongnu.org, Laurent Vivier <laurent@vivier.eu>,
qemu-devel@nongnu.org
Subject: Re: [RFC 03/10] hw/mos6522: Remove redundant mos6522_timer1_update() calls
Date: Wed, 25 Aug 2021 08:09:21 +0100 [thread overview]
Message-ID: <bd65a745-90bd-3ea2-9214-84dc73d15f52@ilande.co.uk> (raw)
In-Reply-To: <920eddc0e99bf57e7ac540502f863f222c401d2f.1629799776.git.fthain@linux-m68k.org>
On 24/08/2021 11:09, Finn Thain wrote:
> Reads and writes to the TL and TC registers have no immediate effect on
> a running timer, with the exception of a write to TCH. Hence these
> mos6522_timer_update() calls are not needed.
>
> Signed-off-by: Finn Thain <fthain@linux-m68k.org>
Perhaps better to flip this description around i.e. mention that the low bytes are
written to a latch and then the full 16-bit value is transferred to the latch/counter
when the high byte is written?
Otherwise I think this looks okay.
> ---
> hw/misc/mos6522.c | 7 -------
> 1 file changed, 7 deletions(-)
>
> diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
> index ff246b5437..1d4a56077e 100644
> --- a/hw/misc/mos6522.c
> +++ b/hw/misc/mos6522.c
> @@ -234,7 +234,6 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
> val = s->timers[0].latch & 0xff;
> break;
> case VIA_REG_T1LH:
> - /* XXX: check this */
> val = (s->timers[0].latch >> 8) & 0xff;
> break;
> case VIA_REG_T2CL:
> @@ -303,8 +302,6 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
> break;
> case VIA_REG_T1CL:
> s->timers[0].latch = (s->timers[0].latch & 0xff00) | val;
> - mos6522_timer1_update(s, &s->timers[0],
> - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
> break;
> case VIA_REG_T1CH:
> s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8);
> @@ -313,14 +310,10 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
> break;
> case VIA_REG_T1LL:
> s->timers[0].latch = (s->timers[0].latch & 0xff00) | val;
> - mos6522_timer1_update(s, &s->timers[0],
> - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
> break;
> case VIA_REG_T1LH:
> s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8);
> s->ifr &= ~T1_INT;
> - mos6522_timer1_update(s, &s->timers[0],
> - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
> break;
> case VIA_REG_T2CL:
> s->timers[1].latch = (s->timers[1].latch & 0xff00) | val;
>
ATB,
Mark.
next prev parent reply other threads:[~2021-08-25 7:10 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 10:09 [RFC 00/10] hw/mos6522: VIA timer emulation fixes and improvements Finn Thain
2021-08-24 10:09 ` [RFC 09/10] hw/mos6522: Avoid using discrepant QEMU clock values Finn Thain
2021-08-24 10:28 ` Philippe Mathieu-Daudé
2021-08-29 1:23 ` Finn Thain
2021-08-25 8:44 ` Mark Cave-Ayland
2021-08-29 1:55 ` Finn Thain
2021-08-24 10:09 ` [RFC 06/10] hw/mos6522: Implement oneshot mode Finn Thain
2021-08-25 8:18 ` Mark Cave-Ayland
2021-08-29 1:20 ` Finn Thain
2021-08-24 10:09 ` [RFC 01/10] hw/mos6522: Remove get_load_time() methods and functions Finn Thain
2021-08-24 10:29 ` Philippe Mathieu-Daudé
2021-08-25 6:55 ` Mark Cave-Ayland
2021-08-28 1:00 ` Finn Thain
2021-08-24 10:09 ` [RFC 08/10] hw/mos6522: Call mos6522_update_irq() when appropriate Finn Thain
2021-08-24 10:22 ` Philippe Mathieu-Daudé
2021-08-25 8:26 ` Mark Cave-Ayland
2021-08-24 10:09 ` [RFC 07/10] hw/mos6522: Fix initial timer counter reload Finn Thain
2021-08-25 8:23 ` Mark Cave-Ayland
2021-08-28 0:46 ` Finn Thain
2021-08-24 10:09 ` [RFC 10/10] hw/mos6522: Synchronize timer interrupt and timer counter Finn Thain
2021-08-25 8:52 ` Mark Cave-Ayland
2021-08-26 6:43 ` Finn Thain
2021-08-24 10:09 ` [RFC 04/10] hw/mos6522: Rename timer callback functions Finn Thain
2021-08-24 10:28 ` Philippe Mathieu-Daudé
2021-08-25 7:11 ` Mark Cave-Ayland
2021-08-26 7:42 ` Philippe Mathieu-Daudé
2021-08-24 10:09 ` [RFC 02/10] hw/mos6522: Remove get_counter_value() methods and functions Finn Thain
2021-08-24 10:29 ` Philippe Mathieu-Daudé
2021-08-24 10:09 ` [RFC 05/10] hw/mos6522: Don't clear T1 interrupt flag on latch write Finn Thain
2021-08-25 7:20 ` Mark Cave-Ayland
2021-08-26 5:21 ` Finn Thain
2021-09-01 14:32 ` Laurent Vivier
2021-09-01 22:26 ` Finn Thain
2021-08-24 10:09 ` [RFC 03/10] hw/mos6522: Remove redundant mos6522_timer1_update() calls Finn Thain
2021-08-25 7:09 ` Mark Cave-Ayland [this message]
2021-08-24 10:34 ` [RFC 00/10] hw/mos6522: VIA timer emulation fixes and improvements Philippe Mathieu-Daudé
2021-08-28 1:22 ` Finn Thain
2021-08-31 21:14 ` Mark Cave-Ayland
2021-08-31 22:44 ` Finn Thain
2021-09-01 7:57 ` Mark Cave-Ayland
2021-09-01 8:06 ` Mark Cave-Ayland
2021-09-10 17:29 ` Mark Cave-Ayland
2021-09-11 0:08 ` Finn Thain
2021-09-01 2:20 ` Finn Thain
2021-08-25 3:11 ` David Gibson
2021-08-25 9:10 ` Mark Cave-Ayland
2021-08-28 4:11 ` Finn Thain
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