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Sat, 23 Oct 2021 13:46:15 -0700 (PDT) Subject: Re: [PATCH 21/33] target/ppc: moved stxv and lxv from legacy to decodtree To: matheus.ferst@eldorado.org.br, qemu-devel@nongnu.org, qemu-ppc@nongnu.org References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> <20211021194547.672988-22-matheus.ferst@eldorado.org.br> From: Richard Henderson Message-ID: Date: Sat, 23 Oct 2021 13:46:13 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211021194547.672988-22-matheus.ferst@eldorado.org.br> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -38 X-Spam_score: -3.9 X-Spam_bar: --- X-Spam_report: (-3.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.781, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, luis.pires@eldorado.org.br, groug@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/21/21 12:45 PM, matheus.ferst@eldorado.org.br wrote: > + if (ctx->le_mode) { > + gen_addr_add(ctx, ea, ea, 8); > + offset = -8; > + } else { > + offset = 8; > + } > + > + if (store) { > + get_cpu_vsrh(xt, rt); > + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); > + gen_addr_add(ctx, ea, ea, offset); > + get_cpu_vsrl(xt, rt); > + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); > + } else { > + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); > + set_cpu_vsrh(rt, xt); > + gen_addr_add(ctx, ea, ea, offset); > + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); > + set_cpu_vsrl(rt, xt); > + } Actually, I'm going to reverse myself again. This has a behaviour change: for LE, the first access is to EA+8 instead of EA. Thus the SIGSEGV for a load from NULL will report address 8 not 0, which is probably not the correct result. r~