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[174.21.150.71]) by smtp.gmail.com with ESMTPSA id d203sm44349129pfd.148.2020.12.30.14.10.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Dec 2020 14:10:11 -0800 (PST) Subject: Re: [PATCH 1/3] target/arm: keep translation start level unsigned To: remi.denis.courmont@huawei.com, qemu-arm@nongnu.org References: <7884934.NyiUUSuA9g@basile.remlab.net> <20201218143321.102872-1-remi.denis.courmont@huawei.com> From: Richard Henderson Message-ID: Date: Wed, 30 Dec 2020 14:10:09 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20201218143321.102872-1-remi.denis.courmont@huawei.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -54 X-Spam_score: -5.5 X-Spam_bar: ----- X-Spam_report: (-5.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-3.399, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/18/20 6:33 AM, remi.denis.courmont@huawei.com wrote: > From: Rémi Denis-Courmont > > Signed-off-by: Rémi Denis-Courmont > --- > target/arm/helper.c | 14 ++++++-------- > 1 file changed, 6 insertions(+), 8 deletions(-) The patch does more than what is described above. > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index df195c314c..b927e53ab0 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -10821,17 +10821,12 @@ do_fault: > * Returns true if the suggested S2 translation parameters are OK and > * false otherwise. > */ > -static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level, > +static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, uint32_t level, > int inputsize, int stride) > { > const int grainsize = stride + 3; > int startsizecheck; > > - /* Negative levels are never allowed. */ > - if (level < 0) { > - return false; > - } > - I would expect this to be the only hunk from the patch description. Probably changing this negative check to a >= 3 check. r~ > startsizecheck = inputsize - ((3 - level) * stride + grainsize); > if (startsizecheck < 1 || startsizecheck > stride + 4) { > return false; > @@ -10856,6 +10851,9 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level, > if (level == 0 && pamax <= 42) { > return false; > } > + if (level == 3) { > + return false; > + } > break; > default: > g_assert_not_reached(); > @@ -10871,7 +10869,7 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level, > /* AArch32 only supports 4KB pages. Assert on that. */ > assert(stride == 9); > > - if (level == 0) { > + if (level == 0 || level >= 3) { > return false; > } > } > @@ -11203,7 +11201,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, > > if (!aarch64 || stride == 9) { > /* AArch32 or 4KB pages */ > - startlevel = 2 - sl0; > + startlevel = (2 - sl0) & 3; > } else { > /* 16KB or 64KB pages */ > startlevel = 3 - sl0; >