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([2001:8003:e5b0:9f00:dbbc:1945:6e65:ec5]) by smtp.gmail.com with ESMTPSA id d24-20020aa78158000000b0068fc2fe4612sm13939445pfn.194.2023.09.28.16.58.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Sep 2023 16:58:12 -0700 (PDT) Message-ID: Date: Fri, 29 Sep 2023 09:57:58 +1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH RFC V2 23/37] arm/virt: Release objects for *disabled* possible vCPUs after init Content-Language: en-US To: Salil Mehta , qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: maz@kernel.org, jean-philippe@linaro.org, jonathan.cameron@huawei.com, lpieralisi@kernel.org, peter.maydell@linaro.org, richard.henderson@linaro.org, imammedo@redhat.com, andrew.jones@linux.dev, david@redhat.com, philmd@linaro.org, eric.auger@redhat.com, will@kernel.org, ardb@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com, mst@redhat.com, rafael@kernel.org, borntraeger@linux.ibm.com, alex.bennee@linaro.org, linux@armlinux.org.uk, darren@os.amperecomputing.com, ilkka@os.amperecomputing.com, vishnu@os.amperecomputing.com, karl.heubaum@oracle.com, miguel.luis@oracle.com, salil.mehta@opnsrc.net, zhukeqian1@huawei.com, wangxiongfeng2@huawei.com, wangyanan55@huawei.com, jiakernel2@gmail.com, maobibo@loongson.cn, lixianglai@loongson.cn References: <20230926100436.28284-1-salil.mehta@huawei.com> <20230926100436.28284-24-salil.mehta@huawei.com> From: Gavin Shan In-Reply-To: <20230926100436.28284-24-salil.mehta@huawei.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.473, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Salil, On 9/26/23 20:04, Salil Mehta wrote: > During machvirt_init(), QOM ARMCPU objects are also pre-created along with the > corresponding KVM vCPUs in the host for all possible vCPUs. This necessary > because of the architectural constraint, KVM restricts the deferred creation of > the KVM vCPUs and VGIC initialization/sizing after VM init. Hence, VGIC is > pre-sized with possible vCPUs. > > After initialization of the machine is complete disabled possible KVM vCPUs are > then parked at the per-virt-machine list "kvm_parked_vcpus" and we release the > QOM ARMCPU objects for the disabled vCPUs. These shall be re-created at the time > when vCPU is hotplugged again. QOM ARMCPU object is then re-attached with > corresponding parked KVM vCPU. > > Alternatively, we could've never released the QOM CPU objects and kept on > reusing. This approach might require some modifications of qdevice_add() > interface to get old ARMCPU object instead of creating a new one for the hotplug > request. > > Each of the above approaches come with their own pros and cons. This prototype > uses the 1st approach.(suggestions are welcome!) > > Co-developed-by: Salil Mehta > Signed-off-by: Salil Mehta > Co-developed-by: Keqian Zhu > Signed-off-by: Keqian Zhu > Signed-off-by: Salil Mehta > --- > hw/arm/virt.c | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index f1bee569d5..3b068534a8 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -1965,6 +1965,7 @@ static void virt_cpu_post_init(VirtMachineState *vms, MemoryRegion *sysmem) > { > CPUArchIdList *possible_cpus = vms->parent.possible_cpus; > int max_cpus = MACHINE(vms)->smp.max_cpus; > + MachineState *ms = MACHINE(vms); > bool aarch64, steal_time; > CPUState *cpu; > int n; > @@ -2025,6 +2026,37 @@ static void virt_cpu_post_init(VirtMachineState *vms, MemoryRegion *sysmem) > } > } > } > + > + if (kvm_enabled() || tcg_enabled()) { > + for (n = 0; n < possible_cpus->len; n++) { > + cpu = qemu_get_possible_cpu(n); > + > + /* > + * Now, GIC has been sized with possible CPUs and we dont require > + * disabled vCPU objects to be represented in the QOM. Release the > + * disabled ARMCPU objects earlier used during init for pre-sizing. > + * > + * We fake to the guest through ACPI about the presence(_STA.PRES=1) > + * of these non-existent vCPUs at VMM/qemu and present these as > + * disabled vCPUs(_STA.ENA=0) so that they cant be used. These vCPUs > + * can be later added to the guest through hotplug exchanges when > + * ARMCPU objects are created back again using 'device_add' QMP > + * command. > + */ > + /* > + * RFC: Question: Other approach could've been to keep them forever > + * and release it only once when qemu exits as part of finalize or > + * when new vCPU is hotplugged. In the later old could be released > + * for the newly created object for the same vCPU? > + */ > + if (!qemu_enabled_cpu(cpu)) { > + CPUArchId *cpu_slot; > + cpu_slot = virt_find_cpu_slot(ms, cpu->cpu_index); > + cpu_slot->cpu = NULL; > + object_unref(OBJECT(cpu)); > + } > + } > + } > } > Needn't we release those CPU instances for hve and qtest? Besides, I think it's hard for reuse those objects because they're managed by QOM, which is almost transparent to us, correct? > static void virt_cpu_set_properties(Object *cpuobj, const CPUArchId *cpu_slot, Thanks, Gavin