From: David Hildenbrand <david@redhat.com>
To: Thomas Huth <thuth@redhat.com>, qemu-devel@nongnu.org
Cc: Janosch Frank <frankja@linux.ibm.com>,
Cornelia Huck <cohuck@redhat.com>,
Halil Pasic <pasic@linux.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
qemu-s390x@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [qemu-s390x] [PATCH-for-4.2 v1 1/6] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug()
Date: Mon, 12 Aug 2019 17:28:08 +0200 [thread overview]
Message-ID: <c7fb18fd-8a47-b49b-765d-b48988e9e83a@redhat.com> (raw)
In-Reply-To: <158cb382-f685-a60b-821b-f82ba424feb4@redhat.com>
On 12.08.19 17:18, Thomas Huth wrote:
> On 8/12/19 1:27 PM, David Hildenbrand wrote:
>> Let's select the ASC before calling the function. This is a prepararion
>> to remove the ASC magic depending on the access mode from mmu_translate.
>>
>> There is currently no way to distinguish if we have code or data access.
>> For now, we were using code access, because especially when debugging with
>> the gdbstub, we want to read and disassemble what we single-step.
>
> IMHO we should add a "instruction" bit to MemTxAttrs and then use the
> ...page_attrs_debug() interface instead. But ok, that's likely really
> something for a separate clean-up, so for the time being:
>
That sounds like a good idea, and then switching over to
cc->get_phys_page_attrs()
Thanks!
> Reviewed-by: Thomas Huth <thuth@redhat.com>
>
--
Thanks,
David / dhildenb
next prev parent reply other threads:[~2019-08-12 15:29 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-12 11:27 [Qemu-devel] [PATCH-for-4.2 v1 0/6] s390x/mmu: Storage key reference and change bit handling David Hildenbrand
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 1/6] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug() David Hildenbrand
2019-08-12 15:18 ` [Qemu-devel] [qemu-s390x] " Thomas Huth
2019-08-12 15:28 ` David Hildenbrand [this message]
2019-08-12 15:39 ` David Hildenbrand
2019-08-12 16:04 ` Thomas Huth
2019-08-13 12:51 ` [Qemu-devel] " Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 2/6] s390x/tcg: Rework MMU selection for instruction fetches David Hildenbrand
2019-08-12 13:37 ` David Hildenbrand
2019-08-13 12:52 ` Cornelia Huck
2019-08-13 12:53 ` David Hildenbrand
2019-08-13 13:16 ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 3/6] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE David Hildenbrand
2019-08-13 13:42 ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 4/6] s390x/mmu: Trace the right value if setting/getting the storage key fails David Hildenbrand
2019-08-12 13:01 ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 5/6] s390x/mmu: Better storage key reference and change bit handling David Hildenbrand
2019-08-13 14:54 ` Cornelia Huck
2019-08-14 7:20 ` [Qemu-devel] [qemu-s390x] " David Hildenbrand
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 6/6] s390x/mmu: Factor out storage key handling David Hildenbrand
2019-08-13 15:04 ` Cornelia Huck
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