From: Auger Eric <eric.auger@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>, qemu-devel@nongnu.org
Cc: Fam Zheng <fam@euphon.net>, Kevin Wolf <kwolf@redhat.com>,
qemu-block@nongnu.org, Max Reitz <mreitz@redhat.com>,
Alex Williamson <alex.williamson@redhat.com>,
Stefan Hajnoczi <stefanha@redhat.com>
Subject: Re: [PATCH v2 07/19] util/vfio-helpers: Trace PCI BAR region info
Date: Mon, 26 Oct 2020 19:06:19 +0100 [thread overview]
Message-ID: <c95c0cc2-7e32-6fee-a51a-948051604161@redhat.com> (raw)
In-Reply-To: <20201026105504.4023620-8-philmd@redhat.com>
Hi Philippe,
On 10/26/20 11:54 AM, Philippe Mathieu-Daudé wrote:
> For debug purpose, trace BAR regions info.
>
> Reviewed-by: Fam Zheng <fam@euphon.net>
> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> util/vfio-helpers.c | 8 ++++++++
> util/trace-events | 1 +
> 2 files changed, 9 insertions(+)
>
> diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c
> index 1d4efafcaa4..cd6287c3a98 100644
> --- a/util/vfio-helpers.c
> +++ b/util/vfio-helpers.c
> @@ -136,6 +136,7 @@ static inline void assert_bar_index_valid(QEMUVFIOState *s, int index)
>
> static int qemu_vfio_pci_init_bar(QEMUVFIOState *s, int index, Error **errp)
> {
> + g_autofree char *barname = NULL;
> assert_bar_index_valid(s, index);
> s->bar_region_info[index] = (struct vfio_region_info) {
> .index = VFIO_PCI_BAR0_REGION_INDEX + index,
> @@ -145,6 +146,10 @@ static int qemu_vfio_pci_init_bar(QEMUVFIOState *s, int index, Error **errp)
> error_setg_errno(errp, errno, "Failed to get BAR region info");
> return -errno;
> }
> + barname = g_strdup_printf("bar[%d]", index);
> + trace_qemu_vfio_region_info(barname, s->bar_region_info[index].offset,
> + s->bar_region_info[index].size,
> + s->bar_region_info[index].cap_offset);
>
> return 0;
> }
> @@ -416,6 +421,9 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
> ret = -errno;
> goto fail;
> }
> + trace_qemu_vfio_region_info("config", s->config_region_info.offset,
> + s->config_region_info.size,
> + s->config_region_info.cap_offset);
>
> for (i = 0; i < ARRAY_SIZE(s->bar_region_info); i++) {
> ret = qemu_vfio_pci_init_bar(s, i, errp);
> diff --git a/util/trace-events b/util/trace-events
> index c048f85f828..4d40c74a21f 100644
> --- a/util/trace-events
> +++ b/util/trace-events
> @@ -87,3 +87,4 @@ qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64_t *io
> qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p"
> qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "read cfg ptr %p ofs 0x%x size %d (region ofs 0x%"PRIx64" size %"PRId64")"
> qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "write cfg ptr %p ofs 0x%x size %d (region ofs 0x%"PRIx64" size %"PRId64")"
> +qemu_vfio_region_info(const char *desc, uint64_t offset, uint64_t size, uint32_t cap_offset) "region '%s' ofs 0x%"PRIx64" size %"PRId64" cap_ofs %"PRId32
Use hexa too for the offsets and size. This is generally more readable.
Thanks
Eric
>
next prev parent reply other threads:[~2020-10-26 18:13 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 10:54 [PATCH v2 00/19] util/vfio-helpers: Allow using multiple MSIX IRQs Philippe Mathieu-Daudé
2020-10-26 10:54 ` [PATCH v2 01/19] block/nvme: Correct minimum device page size Philippe Mathieu-Daudé
2020-10-26 17:57 ` Auger Eric
2020-10-26 10:54 ` [PATCH v2 02/19] block/nvme: Set request_alignment at initialization Philippe Mathieu-Daudé
2020-10-26 17:38 ` Auger Eric
2020-10-27 9:24 ` Stefan Hajnoczi
2020-10-26 10:54 ` [PATCH v2 03/19] block/nvme: Introduce device/iommu 'page_size_min' variables Philippe Mathieu-Daudé
2020-10-26 17:38 ` Auger Eric
2020-10-27 9:32 ` Stefan Hajnoczi
2020-10-26 10:54 ` [PATCH v2 04/19] block/nvme: Trace controller capabilities Philippe Mathieu-Daudé
2020-10-26 17:57 ` Auger Eric
2020-10-27 9:41 ` Stefan Hajnoczi
2020-10-26 10:54 ` [PATCH v2 05/19] util/vfio-helpers: Improve reporting unsupported IOMMU type Philippe Mathieu-Daudé
2020-10-26 10:54 ` [PATCH v2 06/19] util/vfio-helpers: Trace PCI I/O config accesses Philippe Mathieu-Daudé
2020-10-26 18:02 ` Auger Eric
2020-10-26 10:54 ` [PATCH v2 07/19] util/vfio-helpers: Trace PCI BAR region info Philippe Mathieu-Daudé
2020-10-26 18:06 ` Auger Eric [this message]
2020-10-26 10:54 ` [PATCH v2 08/19] util/vfio-helpers: Trace where BARs are mapped Philippe Mathieu-Daudé
2020-10-26 10:54 ` [PATCH v2 09/19] util/vfio-helpers: Improve DMA trace events Philippe Mathieu-Daudé
2020-10-26 10:54 ` [PATCH v2 10/19] util/vfio-helpers: Convert vfio_dump_mapping to " Philippe Mathieu-Daudé
2020-10-26 10:54 ` [PATCH v2 11/19] util/vfio-helpers: Let qemu_vfio_dma_map() propagate Error Philippe Mathieu-Daudé
2020-10-26 19:58 ` Auger Eric
2020-10-26 10:54 ` [PATCH v2 12/19] util/vfio-helpers: Let qemu_vfio_do_mapping() " Philippe Mathieu-Daudé
2020-10-26 20:02 ` Auger Eric
2020-10-26 10:54 ` [PATCH v2 13/19] util/vfio-helpers: Let qemu_vfio_verify_mappings() use error_report() Philippe Mathieu-Daudé
2020-10-26 10:54 ` [PATCH v2 14/19] util/vfio-helpers: Pass minimum page size to qemu_vfio_open_pci() Philippe Mathieu-Daudé
2020-10-27 9:50 ` Stefan Hajnoczi
2020-10-26 10:55 ` [PATCH v2 15/19] util/vfio-helpers: Report error when IOMMU page size is not supported Philippe Mathieu-Daudé
2020-10-26 16:12 ` Auger Eric
2020-10-26 10:55 ` [PATCH v2 16/19] util/vfio-helpers: Introduce qemu_vfio_pci_msix_init_irqs() Philippe Mathieu-Daudé
2020-10-26 20:24 ` Auger Eric
2020-10-26 10:55 ` [PATCH v2 17/19] util/vfio-helpers: Introduce qemu_vfio_pci_msix_set_irq() Philippe Mathieu-Daudé
2020-10-26 20:28 ` Auger Eric
2020-10-26 10:55 ` [PATCH v2 18/19] block/nvme: Switch to using the MSIX API Philippe Mathieu-Daudé
2020-10-26 20:32 ` Auger Eric
2020-10-27 9:55 ` Philippe Mathieu-Daudé
2020-10-26 10:55 ` [PATCH v2 19/19] util/vfio-helpers: Remove now unused qemu_vfio_pci_init_irq() Philippe Mathieu-Daudé
2020-10-27 9:55 ` [PATCH v2 00/19] util/vfio-helpers: Allow using multiple MSIX IRQs Stefan Hajnoczi
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