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([2607:fb90:80c6:1fb0:d9de:a301:99b4:6cf3]) by smtp.gmail.com with ESMTPSA id y29sm10199042pfq.29.2021.04.18.12.02.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 18 Apr 2021 12:02:12 -0700 (PDT) Subject: Re: [PATCH 05/26] target/mips: Restrict mips_cpu_dump_state() to cpu.c To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org References: <20210418163134.1133100-1-f4bug@amsat.org> <20210418163134.1133100-6-f4bug@amsat.org> From: Richard Henderson Message-ID: Date: Sun, 18 Apr 2021 12:02:07 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210418163134.1133100-6-f4bug@amsat.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Huacai Chen , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/18/21 9:31 AM, Philippe Mathieu-Daudé wrote: > As mips_cpu_dump_state() is only used once to initialize the > CPUClass::dump_state handler, we can move it to cpu.c to keep > it symbol local. > Beside, this handler is used by all accelerators, while the > translate.c file targets TCG. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/mips/internal.h | 1 - > target/mips/cpu.c | 77 +++++++++++++++++++++++++++++++++++++++++ > target/mips/translate.c | 77 ----------------------------------------- > 3 files changed, 77 insertions(+), 78 deletions(-) > > diff --git a/target/mips/internal.h b/target/mips/internal.h > index a8644f754a6..1c5674935aa 100644 > --- a/target/mips/internal.h > +++ b/target/mips/internal.h > @@ -79,7 +79,6 @@ extern const int mips_defs_number; > > void mips_cpu_do_interrupt(CPUState *cpu); > bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req); > -void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > diff --git a/target/mips/cpu.c b/target/mips/cpu.c > index f354d18aec4..ac38a3262ca 100644 > --- a/target/mips/cpu.c > +++ b/target/mips/cpu.c > @@ -145,6 +145,83 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val) > > #endif /* !CONFIG_USER_ONLY */ > > +static void fpu_dump_state(CPUMIPSState *env, FILE * f, int flags) > +{ > + int i; > + int is_fpu64 = !!(env->hflags & MIPS_HFLAG_F64); > + > +#define printfpr(fp) \ > + do { \ > + if (is_fpu64) \ > + qemu_fprintf(f, "w:%08x d:%016" PRIx64 \ > + " fd:%13g fs:%13g psu: %13g\n", \ > + (fp)->w[FP_ENDIAN_IDX], (fp)->d, \ > + (double)(fp)->fd, \ > + (double)(fp)->fs[FP_ENDIAN_IDX], \ > + (double)(fp)->fs[!FP_ENDIAN_IDX]); \ > + else { \ > + fpr_t tmp; \ > + tmp.w[FP_ENDIAN_IDX] = (fp)->w[FP_ENDIAN_IDX]; \ > + tmp.w[!FP_ENDIAN_IDX] = ((fp) + 1)->w[FP_ENDIAN_IDX]; \ > + qemu_fprintf(f, "w:%08x d:%016" PRIx64 \ > + " fd:%13g fs:%13g psu:%13g\n", \ > + tmp.w[FP_ENDIAN_IDX], tmp.d, \ > + (double)tmp.fd, \ > + (double)tmp.fs[FP_ENDIAN_IDX], \ > + (double)tmp.fs[!FP_ENDIAN_IDX]); \ > + } \ > + } while (0) > + Code motion, so, Reviewed-by: Richard Henderson > + > + qemu_fprintf(f, > + "CP1 FCR0 0x%08x FCR31 0x%08x SR.FR %d fp_status 0x%02x\n", > + env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64, > + get_float_exception_flags(&env->active_fpu.fp_status)); > + for (i = 0; i < 32; (is_fpu64) ? i++ : (i += 2)) { > + qemu_fprintf(f, "%3s: ", fregnames[i]); > + printfpr(&env->active_fpu.fpr[i]); ... but since this macro has exacly one use, can we just inline it here? Or turn it into a proper function? r~