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Tue, 31 Aug 2021 07:23:47 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.5.0-alpha0-1124-g8f1c7cb9de-fm-20210824.001-g8f1c7cb9 Mime-Version: 1.0 Message-Id: In-Reply-To: <547b5f32-0858-1882-fb8b-c60056cdbfd4@kaod.org> References: <20210827210417.4022054-1-pdel@fb.com> <20210827210417.4022054-3-pdel@fb.com> <7a53d5e9-52c2-a06b-1385-fd71a96d7486@kaod.org> <547b5f32-0858-1882-fb8b-c60056cdbfd4@kaod.org> Date: Tue, 31 Aug 2021 20:53:10 +0930 From: "Andrew Jeffery" To: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , "Peter Delevoryas" Subject: Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=66.111.4.28; envelope-from=andrew@aj.id.au; helo=out4-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "qemu-arm@nongnu.org" , Joel Stanley , Cameron Esfahani via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi C=C3=A9dric, Peter, On Tue, 31 Aug 2021, at 20:09, C=C3=A9dric Le Goater wrote: > On 8/28/21 5:58 PM, Peter Delevoryas wrote: > > I think I=E2=80=99m a little confused on this part. What I meant by = =E2=80=9Cmost machines just use UART5=E2=80=9D was that most DTS=E2=80=99= s use =E2=80=9Cstdout-path=3D&uart5=E2=80=9D, but fuji uses =E2=80=9Cstd= out-path=3D&uart1=E2=80=9D. I /do/ see that SCU510 includes a bit relate= d to UART, but it=E2=80=99s for disabling booting from UART1 and UART5. = I just care about the console aspect, not booting. >=20 > The UART can be switched with SCU70[29] on the AST2500, btw. If it helps, neither the AST2600's "Boot from UART" feature nor the=20 AST2[456]00's "Debug UART" feature are related to which UART is used as=20 the BMC console by u-boot and/or the kernel - the latter is entirely a=20 software thing. The "Debug UART" is a hardware backdoor, a UART-to-AHB bridge=20 implemented by the SoC. It provides a shell environment that allows you=20 to issue transactions directly on the AHB if you perform a magic knock.=20 I have a driver for it implemented here: https://github.com/amboar/cve-2019-6260/blob/master/src/debug.c SCU70[29] on the AST2500 selects whether this backdoor is exposed on=20 UART1 or UART5. The "Boot from UART" feature is implemented in the AST2600 ROM code as=20 a fallback for loading the SPL if fetching it from SPI-NOR or the eMMC=20 fails, or the SPL is incorrectly signed for secure-boot. I think Peter is on the right track with this patch? Andrew