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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id c7sm15326220wrp.51.2021.10.26.01.56.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Oct 2021 01:56:48 -0700 (PDT) Message-ID: Date: Tue, 26 Oct 2021 10:56:47 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Subject: Re: [PATCH] hvf: arm: Ignore cache operations on MMIO Content-Language: en-US To: Alexander Graf , Richard Henderson , Cameron Esfahani References: <20211025191349.52992-1-agraf@csgraf.de> <1d84fe5e-1933-8798-ff42-e752ea4e5943@csgraf.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <1d84fe5e-1933-8798-ff42-e752ea4e5943@csgraf.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x330.google.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-2.846, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , kettenis@openbsd.org, Roman Bolshakov , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/26/21 09:09, Alexander Graf wrote: > On 26.10.21 02:14, Richard Henderson wrote: >> On 10/25/21 12:13 PM, Alexander Graf wrote: >>> @@ -1156,6 +1183,11 @@ int hvf_vcpu_exec(CPUState *cpu) >>> hvf_exit->exception.physical_address, isv, >>>                                iswrite, s1ptw, len, srt); >>>   +        if (!isv) { >>> +            g_assert(hvf_emulate_insn(cpu)); >>> +            advance_pc = true; >>> +            break; >>> +        } >>>           assert(isv); >> >> Ouch.  HVF really passes along an invalid syndrome?  I was expecting >> that you'd be able to avoid all of the instruction parsing and check >> syndrome.cm (bit 8) for a cache management instruction. > > > That's a very subtle way of telling me I'm stupid :). Thanks for the > catch! Using the CM bit is obviously way better. Let me build v2. Having given my R-b I take half of the blame.