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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id d6sm2215468wrq.67.2020.10.02.08.34.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 02 Oct 2020 08:34:52 -0700 (PDT) Subject: Re: [PATCH 09/14] hw/misc/bcm2835_cprman: add a clock mux skeleton implementation From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= To: Luc Michel , qemu-devel@nongnu.org References: <20200925101731.2159827-1-luc@lmichel.fr> <20200925101731.2159827-10-luc@lmichel.fr> <2a18bb94-1e6c-d853-3e6e-f6874b617a2b@amsat.org> Autocrypt: addr=f4bug@amsat.org; keydata= mQINBDU8rLoBEADb5b5dyglKgWF9uDbIjFXU4gDtcwiga9wJ/wX6xdhBqU8tlQ4BroH7AeRl u4zXP0QnBDAG7EetxlQzcfYbPmxFISWjckDBFvDbFsojrZmwF2/LkFSzlvKiN5KLghzzJhLO HhjGlF8deEZz/d/G8qzO9mIw8GIBS8uuWh6SIcG/qq7+y+2+aifaj92EdwU79apZepT/U3vN YrfcAuo1Ycy7/u0hJ7rlaFUn2Fu5KIgV2O++hHYtCCQfdPBg/+ujTL+U+sCDawCyq+9M5+LJ ojCzP9rViLZDd/gS6jX8T48hhidtbtsFRj/e9QpdZgDZfowRMVsRx+TB9yzjFdMO0YaYybXp dg/wCUepX5xmDBrle6cZ8VEe00+UQCAU1TY5Hs7QFfBbjgR3k9pgJzVXNUKcJ9DYQP0OBH9P ZbZvM0Ut2Bk6bLBO5iCVDOco0alrPkX7iJul2QWBy3Iy9j02GnA5jZ1Xtjr9kpCqQT+sRXso Vpm5TPGWaWljIeLWy/qL8drX1eyJzwTB3A36Ck4r3YmjMjfmvltSZB1uAdo1elHTlFEULpU/ HiwvvqXQ9koB15U154VCuguvx/Qnboz8GFb9Uw8VyawzVxYVNME7xw7CQF8FYxzj6eI7rBf2 Dj/II6wxWPgDEy3oUzuNOxTB7sT3b/Ym76yOJzWX5BylXQIJ5wARAQABtDFQaGlsaXBwZSBN YXRoaWV1LURhdWTDqSAoRjRCVUcpIDxmNGJ1Z0BhbXNhdC5vcmc+iQJVBBMBCAA/AhsPBgsJ CAcDAgYVCAIJCgsEFgIDAQIeAQIXgBYhBPqr514SkXIh3P1rsuPjLCzercDeBQJd660aBQks klzgAAoJEOPjLCzercDe2iMP+gMG2dUf+qHz2uG8nTBGMjgK0aEJrKVPodFA+iedQ5Kp3BMo jrTg3/DG1HMYdcvQu/NFLYwamUfUasyor1k+3dB23hY09O4xOsYJBWdilkBGsJTKErUmkUO2 3J/kawosvYtJJSHUpw3N6mwz/iWnjkT8BPp7fFXSujV63aZWZINueTbK7Y8skFHI0zpype9s loU8xc4JBrieGccy3n4E/kogGrTG5jcMTNHZ106DsQkhFnjhWETp6g9xOKrzZQbETeRBOe4P sRsY9YSG2Sj+ZqmZePvO8LyzGRjYU7T6Z80S1xV0lH6KTMvq7vvz5rd92f3pL4YrXq+e//HZ JsiLen8LH/FRhTsWRgBtNYkOsd5F9NvfJtSM0qbX32cSXMAStDVnS4U+H2vCVCWnfNug2TdY 7v4NtdpaCi4CBBa3ZtqYVOU05IoLnlx0miKTBMqmI05kpgX98pi2QUPJBYi/+yNu3fjjcuS9 K5WmpNFTNi6yiBbNjJA5E2qUKbIT/RwQFQvhrxBUcRCuK4x/5uOZrysjFvhtR8YGm08h+8vS n0JCnJD5aBhiVdkohEFAz7e5YNrAg6kOA5IVRHB44lTBOatLqz7ntwdGD0rteKuHaUuXpTYy CRqCVAKqFJtxhvJvaX0vLS1Z2dwtDwhjfIdgPiKEGOgCNGH7R8l+aaM4OPOd Message-ID: Date: Fri, 2 Oct 2020 17:34:51 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <2a18bb94-1e6c-d853-3e6e-f6874b617a2b@amsat.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, NICE_REPLY_A=-0.256, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Andrew Baumann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/2/20 4:42 PM, Philippe Mathieu-Daudé wrote: > On 9/25/20 12:17 PM, Luc Michel wrote: >> The clock multiplexers are the last clock stage in the cprman. Each mux >> outputs one clock signal that goes out of the cprman to the SoC >> peripherals. >> >> Each mux has at most 10 sources. The sources 0 to 3 are common to all >> muxes. They are: >> 0. ground (no clock signal) >> 1. the main oscillator (xosc) >> 2. "test debug 0" clock >> 3. "test debug 1" clock >> >> Test debug 0 and 1 are actual clock muxes that can be used as sources to >> other muxes (for debug purpose). >> >> Sources 4 to 9 are mux specific and can be unpopulated (grounded). Those >> sources are fed by the PLL channels outputs. >> >> One corner case exists for DSI0E and DSI0P muxes. They have their source >> number 4 connected to an intermediate multiplexer that can select >> between PLLA-DSI0 and PLLD-DSI0 channel. This multiplexer is called >> DSI0HSCK and is not a clock mux as such. It is really a simple mux from >> the hardware point of view (see https://elinux.org/The_Undocumented_Pi). >> This mux is not implemented in this commit. >> >> Note that there is some muxes for which sources are unknown (because of >> a lack of documentation). For those cases all the sources are connected >> to ground in this implementation. >> >> Each clock mux output is exported by the cprman at the qdev level, >> adding the suffix '-out' to the mux name to form the output clock name. >> (E.g. the 'uart' mux sees its output exported as 'uart-out' at the >> cprman level.) >> >> Signed-off-by: Luc Michel >> --- [...] >> struct BCM2835CprmanState { >> /*< private >*/ >> SysBusDevice parent_obj; >> >> /*< public >*/ >> MemoryRegion iomem; >> >> CprmanPLLState plls[CPRMAN_NUM_PLL]; >> CprmanPLLChannelState channels[CPRMAN_NUM_PLL_CHANNEL]; >> + CprmanClockMuxState clock_muxes[CPRMAN_NUM_CLOCK_MUX]; >> >> uint32_t regs[CPRMAN_NUM_REGS]; >> uint32_t xosc_freq; >> >> Clock *xosc; >> + Clock *gnd; > > This one seems to belong to MachineState in "hw/boards.h". Although it might be easier to have a singleton in hw/core/clock.c...