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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id ds11sm6678664pjb.0.2020.06.04.20.30.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Jun 2020 20:30:22 -0700 (PDT) Subject: Re: [PATCH v8 30/62] target/riscv: Update fp_status when float rounding mode changes To: LIU Zhiwei , qemu-devel@nongnu.org, qemu-riscv@nongnu.org References: <20200521094413.10425-1-zhiwei_liu@c-sky.com> <20200521094413.10425-31-zhiwei_liu@c-sky.com> <7cb2aa5d-833a-8544-dadc-5aabba06ecd2@linaro.org> <7ec3d397-bf9a-07f5-3014-4acf47a4fd6e@linaro.org> From: Richard Henderson Message-ID: Date: Thu, 4 Jun 2020 20:30:18 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::641; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x641.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, wenmeng_zhang@c-sky.com, alistair.francis@wdc.com, wxy194768@alibaba-inc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 6/4/20 7:50 PM, LIU Zhiwei wrote: > So no scalar insns will require changes within a translation block. Not true -- scalar insns can encode rm into the instruction. > I think there is a error in gen_set_rm > > static void gen_set_rm(DisasContext *ctx, int rm) > { >     TCGv_i32 t0; > >     if (ctx->frm == rm) { >         return; >     } >     ctx->frm = rm; >     t0 = tcg_const_i32(rm); >     gen_helper_set_rounding_mode(cpu_env, t0); >     tcg_temp_free_i32(t0); > } > > I don't know why  updating ctx->frm in this function. This is a cache of the current rm, as most recently stored in env->fp_status.rounding_mode. So if we have fadd.s ft0, ft0, ft0, rtz fadd.s ft0, ft0, ft0, rtz fadd.s ft0, ft0, ft0, rtz we will only switch to round_to_zero once. r~