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([2a01:e35:2fb0:49e0:98dc:fe2:8fe8:bc3b]) by smtp.gmail.com with ESMTPSA id lc18sm11640761ejb.77.2020.12.23.07.21.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Dec 2020 07:21:38 -0800 (PST) Subject: Re: Problems with irq mapping in qemu v5.2 To: Guenter Roeck , QEMU Developers , BALATON Zoltan , John Snow References: <3f0f8fc6-6148-a76e-1088-b7882b0bbcaf@roeck-us.net> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Wed, 23 Dec 2020 16:21:37 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.5.0 MIME-Version: 1.0 In-Reply-To: <3f0f8fc6-6148-a76e-1088-b7882b0bbcaf@roeck-us.net> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-x62d.google.com X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, NICE_REPLY_A=-2.521, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/22/20 5:16 PM, Guenter Roeck wrote: > Hi, > > commit 459ca8bfa41 ("pci: Assert irqnum is between 0 and bus->nirqs in > pci_bus_change_irq_level") added sanity checks to the interrupt number passed > to pci_bus_change_irq_level(). That makes sense, given that bus->irq_count > is indexed and sized by the number of interrupts. > > However, as it turns out, the interrupt number passed to this function > is the _mapped_ interrupt number. The result in assertion failures for various > emulations. > > Examples (I don't know if there are others): > > - ppc4xx_pci_map_irq() maps the interrupt number to "slot - 1". Obviously > that isn't a good thing to do for slot 0, and indeed results in an > assertion as soon as slot 0 is initialized (presumably that is the root > bridge). Changing the mapping to "slot" doesn't help because valid slots > are 0..4, and only four interrupts are allocated. > - pci_bonito_map_irq() changes the mapping all over the place. Whatever > it does, it returns numbers starting with 32 for slots 5..12. With > a total number of 32 interrupts, this again results in an assertion > failure. > > ppc4xx_pci_map_irq() is definitely buggy. I just don't know what the > correct mapping should be. slot & 3, maybe ? > > I don't really have a good solution for pci_bonito_map_irq(). It may not > matter much - I have not been able to boot fuloong_2e since qemu v4.0, > and afaics that is the only platform using it. Maybe it is just completely > broken ? FWIW bisecting Fuloong2E starts failing here: 4ea98d317eb442c738f898f16cfdd47a18b7ca49 is the first bad commit commit 4ea98d317eb442c738f898f16cfdd47a18b7ca49 Author: BALATON Zoltan Date: Fri Jan 25 14:52:12 2019 -0500 ide/via: Implement and use native PCI IDE mode This device only implemented ISA compatibility mode and native PCI IDE mode was missing but no clients actually need ISA mode but to the contrary, they usually want to switch to and use device in native PCI IDE mode. Therefore implement native PCI mode and switch default to that. Signed-off-by: BALATON Zoltan Message-id: c323f08c59b9931310c5d92503d370f77ce3a557.1548160772.git.balaton@eik.bme.hu Signed-off-by: John Snow hw/ide/via.c | 52 ++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 38 insertions(+), 14 deletions(-)