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vKi/bafHRWqfMqOAdDkv3Jg4arl2NCG/uNateR1z5e529+UlB4XVAQT+f5T/YyI65DFTY940 il3aZhA8u788jZEPMXmt94u7uPZbEYp7V0jt68SrTaOgO7NaXsboXFjwEa42Ug5lB5d5/Qdp 1AITUv0NJ51kKwhHL1dEagGeloIsGVQILmpS0MLdtitBHqZLsnJkRvtMaxo47giyBlv2ewmq tIGTlVLxHx9xkc9aVepOuiGlZaZB72c9AvZs9rKaAjgU2UfJHlB/Hr4uSk/1EY0IgMv4vnsG 1sA5gvS7A4T4euu0PqHtn2sZEWDrk5RDbw0yIb53JYdXboLFmFXKzVASfKh2ZVeXRBlQQSJi 3PBR1GzzqORlfryby7mkY857xzCI2NkIkD2eq+HhzFTfFOTdGrkCDQRUynn8ARAAwbhP45BE d/zAMBPV2dk2WwIwKRSKULElP3kXpcuiDWYQob3UODUUqClO+3aXVRndaNmZX9WbzGYexVo3 5j+CVBCGr3DlU8AL9pp3KQ3SJihWcDed1LSmUf8tS+10d6mdGxDqgnd/OWU214isvhgWZtZG MM/Xj7cx5pERIiP+jqu7PT1cibcfcEKhPjYdyV1QnLtKNGrTg/UMKaL+qkWBUI/8uBoa0HLs NH63bXsRtNAG8w6qG7iiueYZUIXKc4IHINUguqYQJVdSe+u8b2N5XNhDSEUhdlqFYraJvX6d TjxMTW5lzVG2KjztfErRNSUmu2gezbw1/CV0ztniOKDA7mkQi6UIUDRh4LxRm5mflfKiCyDQ L6P/jxHBxFv+sIgjuLrfNhIC1p3z9rvCh+idAVJgtHtYl8p6GAVrF+4xQV2zZH45tgmHo2+S JsLPjXZtWVsWANpepXnesyabWtNAV4qQB7/SfC77zZwsVX0OOY2Qc+iohmXo8U7DgXVDgl/R /5Qgfnlv0/3rOdMt6ZPy5LJr8D9LJmcP0RvX98jyoBOf06Q9QtEwJsNLCOCo2LKNL71DNjZr nXEwjUH66CXiRXDbDKprt71BiSTitkFhGGU88XCtrp8R9yArXPf4MN+wNYBjfT7K29gWTzxt 9DYQIvEf69oZD5Z5qHYGp031E90AEQEAAYkCPAQYAQIAJgIbDBYhBPrrlxGhLPR1gS8Y8oip Bk0YNWHrBQJcXf3JBQkLVerNAAoJEIipBk0YNWHrU1AP/1FOK2SBGbyhHa5vDHuf47fgLipC e0/h1E0vdSonzlhPxuZoQ47FjzG9uOhqqQG6/PqtWs/FJIyz8aGG4aV+pSA/9Ko3/2ND8MSY ZflWs7Y8Peg08Ro01GTHFITjEUgHpTpHiT6TNcZB5aZNJ8jqCtW5UlqvXXbVeSTmO70ZiVtc vUJbpvSxYmzhFfZWaXIPcNcKWL1rnmnzs67lDhMLdkYVf91aml/XtyMUlfB8Iaejzud9Ht3r C0pA9MG57pLblX7okEshxAC0+tUdY2vANWFeX0mgqRt1GSuG9XM9H/cKP1czfUV/FgaWo/Ya fM4eMhUAlL/y+/AJxxumPhBXftM4yuiktp2JMezoIMJI9fmhjfWDw7+2jVrx9ze1joLakFD1 rVAoHxVJ7ORfQ4Ni/qWbQm3T6qQkSMt4N/scNsMczibdTPxU7qtwQwIeFOOc3wEwmJ9Qe3ox TODQ0agXiWVj0OXYCHJ6MxTDswtyTGQW+nUHpKBgHGwUaR6d1kr/LK9+5LpOfRlK9VRfEu7D PGNiRkr8Abp8jHsrBqQWfUS1bAf62bq6XUel0kUCtb7qCq024aOczXYWPFpJFX+nhp4d7NeH Edq+wlC13sBSiSHC7T5yssJ+7JPa2ATLlSKhEvBsLe2TsSTTtFlA0nBclqhfJXzimiuge9qU E40lvMWBuQINBFTKimUBEADDbJ+pQ5M4QBMWkaWImRj7c598xIZ37oKM6rGaSnuB1SVb7YCr Ci2MTwQcrQscA2jm80O8VFqWk+/XsEp62dty47GVwSfdGje/3zv3VTH2KhOCKOq3oPP5ZXWY rz2d2WnTvx++o6lU7HLHDEC3NGLYNLkL1lyVxLhnhvcMxkf1EGA1DboEcMgnJrNB1pGP27ww cSfvdyPGseV+qZZa8kuViDga1oxmnYDxFKMGLxrClqHrRt8geQL1Wj5KFM5hFtGTK4da5lPn wGNd6/CINMeCT2AWZY5ySz7/tSZe5F22vPvVZGoPgQicYWdNc3ap7+7IKP86JNjmec/9RJcz jvrYjJdiqBVldXou72CtDydKVLVSKv8c2wBDJghYZitfYIaL8cTvQfUHRYTfo0n5KKSec8Vo vjDuxmdbOUBA+SkRxqmneP5OxGoZ92VusrwWCjry8HRsNdR+2T+ClDCO6Wpihu4V3CPkQwTy eCuMHPAT0ka5paTwLrnZIxsdfnjUa96T10vzmQgAxpbbiaLvgKJ8+76OPdDnhddyxd2ldYfw RkF5PEGg3mqZnYKNNBtwjvX49SAvgETQvLzQ8IKVgZS0m4z9qHHvtc1BsQnFfe+LJOFjzZr7 CrDNJMqk1JTHYsSi2JcN3vY32WMezXSQ0TzeMK4kdnclSQyp/h23GWod5QARAQABiQRbBBgB AgAmAhsCFiEE+uuXEaEs9HWBLxjyiKkGTRg1YesFAlxd/coFCQtV2mQCKcFdIAQZAQIABgUC VMqKZQAKCRB974EGqvw5DiJoEACLmuiRq9ifvOh5DyBFwRS7gvA14DsGQngmC57EzV0EFcfM XVi1jX5OtwUyUe0Az5r6lHyyHDsDsIpLKBlWrYCeLpUhRR3oy181T7UNxvujGFeTkzvLAOo6 Hs3b8Wv9ARg+7acRYkQRNY7k0GIJ6YZz149tRyRKAy/vSjsaB9Lt0NOd1wf2EQMKwRVELwJD y0AazGn+0PRP7Bua2YbtxaBmhBBDb2tPpwn8U9xdckB4Vlft9lcWNsC/18Gi9bpjd9FSbdH/ sOUI+3ToWYENeoT4IP09wn6EkgWaJS3nAUN/MOycNej2i4Yhy2wDDSKyTAnVkSSSoXk+tK91 HfqtokbDanB8daP+K5LgoiWHzjfWzsxA2jKisI4YCGjrYQzTyGOT6P6u6SEeoEx10865B/zc 8/vN50kncdjYz2naacIDEKQNZlnGLsGkpCbfmfdi3Zg4vuWKNdWr0wGUzDUcpqW0y/lUXna+ 6uyQShX5e4JD2UPuf9WAQ9HtgSAkaDd4O1I2J41sleePzZOVB3DmYgy+ECRJJ5nw3ihdxpgc y/v3lfcJaqiyCv0PF+K/gSOvwhH7CbVqARmptT7yhhxqFdaYWo2Z2ksuKyoKSRMFCXQY5oac uTmyPIT4STFyUQFeqSCWDum/NFNoSKhmItw2Td+4VSJHShRVbg39KNFPZ7mXYAkQiKkGTRg1 YesWJA/+PV3qDUtPNEGwjVvjQqHSbrBy94tu6gJvPHgGPtRDYvxnCaJsmgiC0pGB2KFRsnfl 2zBNBEWF/XwsI081jQE5UO60GKmHTputChLXpVobyuc+lroG2YhknXRBAV969SLnZR4BS/1s Gi046gOXfaKYatve8BiZr5it5Foq3FMPDNgZMit1H9Dk8rkKFfDMRf8EGS/Z+TmyEsIf99H7 TH3n7lco8qO81fSFwkh4pvo2kWRFYTC5vsIVQ+GqVUp+W1DZJHxX8LwWuF1AzUt4MUTtNAvy TXl5EgsmoY9mpNNL7ZnW65oG63nEP5KNiybvuQJzXVxR8eqzOh2Mod4nHg3PE7UCd3DvLNsn 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List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , "open list:Floppy" , "Michael S. Tsirkin" , "open list:All patches CC here" , Max Reitz , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/1/19 6:54 AM, Herv=C3=A9 Poussineau wrote: > Le 30/10/2019 =C3=A0 09:28, Sven Schnelle a =C3=A9crit=C2=A0: >> While working on the Tulip driver i tried to write some Teledisk >> images to >> a floppy image which didn't work. Turned out that Teledisk checks the >> written >> data by issuing a READ command to the FDC but running the DMA controller >> in VERIFY mode. As we ignored the DMA request in that case, the DMA >> transfer >> never finished, and Teledisk reported an error. >> >> The i8257 spec says about verify transfers: >> >> 3) DMA verify, which does not actually involve the transfer of data. >> When an >> 8257 channel is in the DMA verify mode, it will respond the same as >> described >> for transfer operations, except that no memory or I/O read/write >> control signals >> will be generated. >> >> Herv=C3=A9 proposed to remove all the dma_mode_ok stuff from fdc to have= a >> more >> clear boundary between DMA and FDC, so this patch also does that. >> >> Suggested-by: Herv=C3=A9 Poussineau >> Signed-off-by: Sven Schnelle >> --- >> =C2=A0 hw/block/fdc.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 39 +++++++++= ++++++------------------------ >> =C2=A0 hw/dma/i8257.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 20 +++++++++= ++++------- >> =C2=A0 include/hw/isa/isa.h |=C2=A0 1 - >> =C2=A0 3 files changed, 28 insertions(+), 32 deletions(-) >> >> diff --git a/hw/block/fdc.c b/hw/block/fdc.c >> index ac5d31e8c1..18fd22bfb7 100644 >> --- a/hw/block/fdc.c >> +++ b/hw/block/fdc.c >> @@ -1716,9 +1716,8 @@ static void fdctrl_start_transfer(FDCtrl >> *fdctrl, int direction) >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (fdctrl->dor & FD_DOR_DMAEN) { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 IsaDmaTransferMod= e dma_mode; >=20 > You need to remove this dma_mode variable because you don't set it anymor= e. >=20 >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 IsaDmaClass *k = =3D ISADMA_GET_CLASS(fdctrl->dma); >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool dma_mode_ok; >> + >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* DMA transfer a= re enabled. Check if DMA channel is well >> programmed */ >=20 > Second part of this comment should be removed. >=20 >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma_mode =3D k->get_transfer= _mode(fdctrl->dma, fdctrl->dma_chann); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 FLOPPY_DPRINTF("d= ma_mode=3D%d direction=3D%d (%d - %d)\n", >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dm= a_mode, direction, >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (1= 28 << fdctrl->fifo[5]) * >=20 > You need to remove dma_mode variable from printf statement, as you > removed the variable. >=20 >> @@ -1727,40 +1726,32 @@ static void fdctrl_start_transfer(FDCtrl >> *fdctrl, int direction) >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case FD_DIR_SCANE= : >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case FD_DIR_SCANL= : >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case FD_DIR_SCANH= : >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma_= mode_ok =3D (dma_mode =3D=3D ISADMA_TRANSFER_VERIFY); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 break; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case FD_DIR_WRITE= : >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma_= mode_ok =3D (dma_mode =3D=3D ISADMA_TRANSFER_WRITE); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 break; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case FD_DIR_READ: >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma_= mode_ok =3D (dma_mode =3D=3D ISADMA_TRANSFER_READ); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 break; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case FD_DIR_VERIF= Y: >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma_= mode_ok =3D true; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 break; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 default: >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dma_= mode_ok =3D false; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 break; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } >=20 > Now that you have removed the dma_mode_ok instructions, you have a > switch where all cases do nothing. > Please completly remove the switch statement. >=20 >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (dma_mode_ok) { >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* N= o access is allowed until DMA transfer has completed */ >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fdct= rl->msr &=3D ~FD_MSR_RQM; >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (= direction !=3D FD_DIR_VERIFY) { >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 /* Now, we just have to wait for the DMA controller t= o >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0 * recall us... >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0 */ >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 k->hold_DREQ(fdctrl->dma, fdctrl->dma_chann); >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 k->schedule(fdctrl->dma); >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } el= se { >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 /* Start transfer */ >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 fdctrl_transfer_handler(fdctrl, fdctrl->dma_chann, 0, >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 fdctrl->data_len); >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 retu= rn; >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* No access is allowed unti= l DMA transfer has completed */ >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fdctrl->msr &=3D ~FD_MSR_RQM= ; >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (direction !=3D FD_DIR_VE= RIFY) { >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 * Now, we just have to wait for the DMA controller to >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 * recall us... >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 */ >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 k->h= old_DREQ(fdctrl->dma, fdctrl->dma_chann); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 k->s= chedule(fdctrl->dma); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } else { >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 FLOP= PY_DPRINTF("bad dma_mode=3D%d direction=3D%d\n", dma_mode, >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 direction); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* S= tart transfer */ >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fdct= rl_transfer_handler(fdctrl, fdctrl->dma_chann, 0, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fdctrl->data_len); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 FLOPPY_DPRINTF("start non-DMA transfer\n"= ); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fdctrl->msr |=3D FD_MSR_NONDMA | FD_MSR_R= QM; >> diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c >> index 792f617eb4..85dad3d391 100644 >> --- a/hw/dma/i8257.c >> +++ b/hw/dma/i8257.c >> @@ -292,12 +292,6 @@ static uint64_t i8257_read_cont(void *opaque, >> hwaddr nport, unsigned size) >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return val; >> =C2=A0 } >> =C2=A0 -static IsaDmaTransferMode i8257_dma_get_transfer_mode(IsaDma *ob= j, >> int nchan) >> -{ >> -=C2=A0=C2=A0=C2=A0 I8257State *d =3D I8257(obj); >> -=C2=A0=C2=A0=C2=A0 return (d->regs[nchan & 3].mode >> 2) & 3; >> -} >> - >> =C2=A0 static bool i8257_dma_has_autoinitialization(IsaDma *obj, int nch= an) >> =C2=A0 { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 I8257State *d =3D I8257(obj); >> @@ -400,6 +394,11 @@ static void i8257_dma_register_channel(IsaDma >> *obj, int nchan, >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 r->opaque =3D opaque; >> =C2=A0 } >> =C2=A0 +static bool i8257_is_verify_transfer(I8257Regs *r) >> +{ >> +=C2=A0=C2=A0=C2=A0 return (r->mode & 0x0c) =3D=3D 0; >> +} >> + >> =C2=A0 static int i8257_dma_read_memory(IsaDma *obj, int nchan, void *bu= f, >> int pos, >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int len) >> =C2=A0 { >> @@ -407,6 +406,10 @@ static int i8257_dma_read_memory(IsaDma *obj, int >> nchan, void *buf, int pos, >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 I8257Regs *r =3D &d->regs[nchan & 3]; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 hwaddr addr =3D ((r->pageh & 0x7f) << 24)= | (r->page << 16) | >> r->now[ADDR]; >> =C2=A0 +=C2=A0=C2=A0=C2=A0 if (i8257_is_verify_transfer(r)) { >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return len; >> +=C2=A0=C2=A0=C2=A0 } >> + >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (r->mode & 0x20) { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int i; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uint8_t *p =3D bu= f; >> @@ -431,6 +434,10 @@ static int i8257_dma_write_memory(IsaDma *obj, >> int nchan, void *buf, int pos, >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 I8257Regs *r =3D &s->regs[nchan & 3]; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 hwaddr addr =3D ((r->pageh & 0x7f) << 24)= | (r->page << 16) | >> r->now[ADDR]; >> =C2=A0 +=C2=A0=C2=A0=C2=A0 if (i8257_is_verify_transfer(r)) { >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return len; >> +=C2=A0=C2=A0=C2=A0 } >> + >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (r->mode & 0x20) { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int i; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uint8_t *p =3D bu= f; >> @@ -597,7 +604,6 @@ static void i8257_class_init(ObjectClass *klass, >> void *data) >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dc->vmsd =3D &vmstate_i8257; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dc->props =3D i8257_properties; >> =C2=A0 -=C2=A0=C2=A0=C2=A0 idc->get_transfer_mode =3D i8257_dma_get_tran= sfer_mode; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 idc->has_autoinitialization =3D i8257_dma= _has_autoinitialization; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 idc->read_memory =3D i8257_dma_read_memor= y; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 idc->write_memory =3D i8257_dma_write_mem= ory; >> diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h >> index 018ada4f6f..f516e253c5 100644 >> --- a/include/hw/isa/isa.h >> +++ b/include/hw/isa/isa.h >> @@ -56,7 +56,6 @@ typedef int (*IsaDmaTransferHandler)(void *opaque, >> int nchan, int pos, >> =C2=A0 typedef struct IsaDmaClass { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 InterfaceClass parent; >> =C2=A0 -=C2=A0=C2=A0=C2=A0 IsaDmaTransferMode (*get_transfer_mode)(IsaDm= a *obj, int nchan); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool (*has_autoinitialization)(IsaDma *ob= j, int nchan); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int (*read_memory)(IsaDma *obj, int nchan= , void *buf, int pos, >> int len); >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int (*write_memory)(IsaDma *obj, int ncha= n, void *buf, int pos, >> int len); >> >=20 > Otherwise, the i8257.c parts look good. This might fix some other > devices (except fdc) which might use VERIFY mode. >=20 > Herv=C3=A9 Thanks for the look, Herv=C3=A9! (Hey, do you want the Floppy device maintainership?) --js