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[216.160.65.90]) by smtp.gmail.com with ESMTPSA id r6sm3461360pgn.65.2020.07.23.09.14.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Jul 2020 09:14:27 -0700 (PDT) Subject: Re: [RFC v2 19/76] target/riscv: rvv-0.9: add narrower_nanbox_fpr helper To: Frank Chang References: <20200722091641.8834-1-frank.chang@sifive.com> <20200722091641.8834-20-frank.chang@sifive.com> <87cba14d-0ff5-97b8-b1ed-34872906495a@linaro.org> From: Richard Henderson Message-ID: Date: Thu, 23 Jul 2020 09:14:25 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Sagar Karandikar , Bastian Koppelmann , "qemu-devel@nongnu.org Developers" , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 7/23/20 12:13 AM, Frank Chang wrote: > On Thu, Jul 23, 2020 at 3:15 AM Richard Henderson > wrote: > > On 7/22/20 2:15 AM, frank.chang@sifive.com > wrote: > > From: Frank Chang > > > > > For floating-point operations, the scalar can be taken from a scalar > > f register. If FLEN > SEW, the value in the f registers is checked for > > a valid NaN-boxed value, in which case the least-significant SEW bits > > of the f register are used, else the canonical NaN value is used. > > > > Add helper to generate the correspond NaN-boxed value or the SEW-bit > > canonical NaN for floating-point operations. > > > > Signed-off-by: Frank Chang > > > --- > >  target/riscv/helper.h        |  2 ++ > >  target/riscv/vector_helper.c | 32 ++++++++++++++++++++++++++++++++ > >  2 files changed, 34 insertions(+) > > The helper can be done inline in two tcg ops. > > Though, really, we need to coordinate with Liu Zhiwei's other patch set that > also deals with nan-boxing. > > > So, it's better to leverage the codes > at: https://patchew.org/QEMU/20200626205917.4545-1-zhiwei_liu@c-sky.com/ > but has to extend for the case of SEW=16?  Yes, or what becomes of that patch set upon revision. r~