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X-Received-From: 2607:f8b0:4864:20::542 Subject: Re: [Qemu-devel] [PATCH-4.2 v2 5/5] target/riscv: Fix Floating Point register names X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Alistair Francis , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, 13 Aug 2019 10:06:58 PDT (-0700), alistair23@gmail.com wrote: > On Mon, Aug 12, 2019 at 4:08 PM Palmer Dabbelt wrote: >> >> On Tue, 30 Jul 2019 16:35:34 PDT (-0700), Alistair Francis wrote: >> > From: Atish Patra >> > >> > As per the RISC-V spec, Floating Point registers are named as f0..f31 >> > so lets fix the register names accordingly. >> > >> > Signed-off-by: Atish Patra >> > Signed-off-by: Alistair Francis >> > --- >> > target/riscv/cpu.c | 8 ++++---- >> > 1 file changed, 4 insertions(+), 4 deletions(-) >> > >> > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c >> > index f8d07bd20a..af1e9b7690 100644 >> > --- a/target/riscv/cpu.c >> > +++ b/target/riscv/cpu.c >> > @@ -40,10 +40,10 @@ const char * const riscv_int_regnames[] = { >> > }; >> > >> > const char * const riscv_fpr_regnames[] = { >> > - "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", >> > - "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5", >> > - "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", >> > - "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11" >> > + "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", >> > + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", >> > + "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", >> > + "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31" >> > }; >> > >> > const char * const riscv_excp_names[] = { >> >> I actually don't think this one is right: riscv_int_regnames uses the ABI >> names, so this should match. I'd be OK switching both of them, but not just >> one. > > I like that the int registers use the ABI names though, as I find that useful. > > What about we change the registers to use both? As in something like > x0/zero for all registers? > > The disadvantage is that it's a little longer, but it seems the most useful. I'm fine with that, as long as it doesn't show up in the GDB XML stuff as that will likely cause issues. > Alistair > >> >> I've queued the other four patches.