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From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Magnus Damm <magnus.damm@gmail.com>
Cc: linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH v2] arm64: dts: renesas: rcar-gen3e: Add Cortex-A57 2 GHz opps
Date: Thu, 14 Oct 2021 10:36:07 +0200	[thread overview]
Message-ID: <08a0f27f50b8ad4a78c05186190bebcfb364fe8f.1634200489.git.geert+renesas@glider.be> (raw)

Add operating points for running the Cortex-A57 CPU cores on R-Car
H3e-2G, M3e-2G, and M3Ne-2G at 2 GHz.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Merge 3 patches,
  - Change 2 GHz opps from 1.02V to 0.96V.
    According to the R-Car Series, 3rd Generation-e Hardware User's
    Manual Rev.0.80, the performance mode on R-Car Gen3e-2G SoCs is 2
    GHz, compared to 1.7 on R-Car H3 and 1.8 GHz on R-Car M3-W+ and
    M3-N, but the typical core supply voltages are unchanged.
---
To be queued in renesas-devel for v5.16.

 arch/arm64/boot/dts/renesas/r8a779m1.dtsi | 9 +++++++++
 arch/arm64/boot/dts/renesas/r8a779m3.dtsi | 9 +++++++++
 arch/arm64/boot/dts/renesas/r8a779m5.dtsi | 9 +++++++++
 3 files changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779m1.dtsi b/arch/arm64/boot/dts/renesas/r8a779m1.dtsi
index 0e9b04469b83c661..b6e855f52adf99b5 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779m1.dtsi
@@ -10,3 +10,12 @@
 / {
 	compatible = "renesas,r8a779m1", "renesas,r8a7795";
 };
+
+&cluster0_opp {
+	opp-2000000000 {
+		opp-hz = /bits/ 64 <2000000000>;
+		opp-microvolt = <960000>;
+		clock-latency-ns = <300000>;
+		turbo-mode;
+	};
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a779m3.dtsi b/arch/arm64/boot/dts/renesas/r8a779m3.dtsi
index 65bb6188ccf5470a..6cff38a6d20b47ea 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m3.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779m3.dtsi
@@ -10,3 +10,12 @@
 / {
 	compatible = "renesas,r8a779m3", "renesas,r8a77961";
 };
+
+&cluster0_opp {
+	opp-2000000000 {
+		opp-hz = /bits/ 64 <2000000000>;
+		opp-microvolt = <960000>;
+		clock-latency-ns = <300000>;
+		turbo-mode;
+	};
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a779m5.dtsi b/arch/arm64/boot/dts/renesas/r8a779m5.dtsi
index f0ef765f6cf87319..8c9c0557fe77ed7d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m5.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779m5.dtsi
@@ -10,3 +10,12 @@
 / {
 	compatible = "renesas,r8a779m5", "renesas,r8a77965";
 };
+
+&cluster0_opp {
+	opp-2000000000 {
+		opp-hz = /bits/ 64 <2000000000>;
+		opp-microvolt = <960000>;
+		clock-latency-ns = <300000>;
+		turbo-mode;
+	};
+};
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Magnus Damm <magnus.damm@gmail.com>
Cc: linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH v2] arm64: dts: renesas: rcar-gen3e: Add Cortex-A57 2 GHz opps
Date: Thu, 14 Oct 2021 10:36:07 +0200	[thread overview]
Message-ID: <08a0f27f50b8ad4a78c05186190bebcfb364fe8f.1634200489.git.geert+renesas@glider.be> (raw)

Add operating points for running the Cortex-A57 CPU cores on R-Car
H3e-2G, M3e-2G, and M3Ne-2G at 2 GHz.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Merge 3 patches,
  - Change 2 GHz opps from 1.02V to 0.96V.
    According to the R-Car Series, 3rd Generation-e Hardware User's
    Manual Rev.0.80, the performance mode on R-Car Gen3e-2G SoCs is 2
    GHz, compared to 1.7 on R-Car H3 and 1.8 GHz on R-Car M3-W+ and
    M3-N, but the typical core supply voltages are unchanged.
---
To be queued in renesas-devel for v5.16.

 arch/arm64/boot/dts/renesas/r8a779m1.dtsi | 9 +++++++++
 arch/arm64/boot/dts/renesas/r8a779m3.dtsi | 9 +++++++++
 arch/arm64/boot/dts/renesas/r8a779m5.dtsi | 9 +++++++++
 3 files changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779m1.dtsi b/arch/arm64/boot/dts/renesas/r8a779m1.dtsi
index 0e9b04469b83c661..b6e855f52adf99b5 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779m1.dtsi
@@ -10,3 +10,12 @@
 / {
 	compatible = "renesas,r8a779m1", "renesas,r8a7795";
 };
+
+&cluster0_opp {
+	opp-2000000000 {
+		opp-hz = /bits/ 64 <2000000000>;
+		opp-microvolt = <960000>;
+		clock-latency-ns = <300000>;
+		turbo-mode;
+	};
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a779m3.dtsi b/arch/arm64/boot/dts/renesas/r8a779m3.dtsi
index 65bb6188ccf5470a..6cff38a6d20b47ea 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m3.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779m3.dtsi
@@ -10,3 +10,12 @@
 / {
 	compatible = "renesas,r8a779m3", "renesas,r8a77961";
 };
+
+&cluster0_opp {
+	opp-2000000000 {
+		opp-hz = /bits/ 64 <2000000000>;
+		opp-microvolt = <960000>;
+		clock-latency-ns = <300000>;
+		turbo-mode;
+	};
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a779m5.dtsi b/arch/arm64/boot/dts/renesas/r8a779m5.dtsi
index f0ef765f6cf87319..8c9c0557fe77ed7d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m5.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779m5.dtsi
@@ -10,3 +10,12 @@
 / {
 	compatible = "renesas,r8a779m5", "renesas,r8a77965";
 };
+
+&cluster0_opp {
+	opp-2000000000 {
+		opp-hz = /bits/ 64 <2000000000>;
+		opp-microvolt = <960000>;
+		clock-latency-ns = <300000>;
+		turbo-mode;
+	};
+};
-- 
2.25.1


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             reply	other threads:[~2021-10-14  8:36 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-14  8:36 Geert Uytterhoeven [this message]
2021-10-14  8:36 ` [PATCH v2] arm64: dts: renesas: rcar-gen3e: Add Cortex-A57 2 GHz opps Geert Uytterhoeven

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